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On Reducing Insertion Loss in Wavelength-Routed Optical Network-on-Chip Architecture

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Abstract

Optical/photonic network-on-chip (ONoC) architectures are emerging as a new paradigm to interconnect a large number of processing cores at chip level, meeting the pressing demand for extremely high bandwidth and low power consumption. The micro-ring resonator is the key switching component to build such an architecture. However, there is a major concern in accumulated signal insertion loss, especially for large-scale ONoC architectures. In this paper, we propose a new method to transform the ONoC topologies such that the insertion loss can be reduced. Analytical results have confirmed the effectiveness of the proposed method in insertion-loss reduction.

© 2014 Optical Society of America

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