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Emerging devices and packaging strategies for electronic-photonic AI accelerators: opinion

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Abstract

The field of mimicking the structure of the brain on a chip is experiencing interest driven by the demand for machine intelligent applications. However, the power consumption and available performance of machine-learning (ML) accelerating hardware still leave much desire for improvement. In this letter, we share viewpoints, challenges, and prospects of electronic-photonic neural network (NN) accelerators. Combining electronics with photonics offers synergistic co-design strategies for high-performance AI Application-specific integrated circuits (ASICs) and systems. Taking advantages of photonic signal processing capabilities and combining them with electronic logic control and data storage is an emerging prospect. However, the optical component library leaves much to be desired and is challenged by the enormous size of photonic devices. Within this context, we will review the emerging electro-optic materials, functional devices, and systems packaging strategies that, when realized, provide significant performance gains and fuel the ongoing AI revolution, leading to a stand-alone photonics-inside AI ASIC ‘black-box’ for streamlined plug-and-play board integration in future AI processors.

© 2022 Optica Publishing Group under the terms of the Optica Open Access Publishing Agreement

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Data Availability

No data were generated or analyzed in the presented research.

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Figures (2)

Fig. 1.
Fig. 1. Performance of the AI ASIC weights and biases rely on the material of the reconfigurable memory devices. (a) Memory requirements depend on the machine learning application [8]. (b) P-RAM options from the recent literature. i-ii) An unbalanced MZI and a MRR with $\text {Sb}_{\text {2}}\text {Se}_{\text {3}}$ cell [13]. iii) A 1x2 directional coupler with GST cell [14]. iv) Waveguide with GSSe cell and multiple double-sided heaters [10]. v) Schematic of the laser pulse to amorphized and crystallize the integrated phase-change photonic memory cell [15].
Fig. 2.
Fig. 2. Example of I/O integration for PIC. a-b) Well-known coupling structures, such as Grating and Edge couplers [20]. c) Example of Photonic Wire Bonding [21]. d) Back-side-on-BOX heterogeneously integrated III-V-on-silicon [22]. e) Hybrid integration using Micro-Transfer-Printing [23]. f) Graphical representation of the Photonic Black-box concept.
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