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High Density Silicon Photonic Integrated Transceiver Chip with 1.2 Tbps Capacity

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Abstract

To achieve high capacity, high density, low power consumption and low-cost non-hermetic package, a silicon photonic transceiver chip with 42-channel I/O was demonstrated. With each I/O supports 28 Gbps rate, the transceiver chip reached 1.2 Tbps capacity.

© 2016 Optical Society of America

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