Abstract

Monolithically integrated light sources on silicon are key for future semiconductor microchips that comprise Si CMOS and on-chip optical interconnects as prerequisite for more energy efficient computers and data centres. Recently, major advances were achieved regarding direct integration of III-V gain material on silicon without introducing threading dislocations, especially via heteroepitaxy of semiconductor nanowires [1]. In particular, lasing of III-V nanowires on silicon [2] have been reported demonstrating the high potential of such devices for future on-chip light sources. However, nanowire cavities provide only low optical feedback from the NW-end facets which increases their lasing threshold. Additionally, vertically grown nanowires hinder efficient coupling to in-plane photonic waveguides and circuitries.

© 2017 IEEE