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A Timing Jitter Insensitive Logic Gate Using Tunable Gain Dynamics in an SOA and Optical Thresholding

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Abstract

We experimentally demonstrate a reconfigurable and timing-jitter insensitive AND/NOT gate based on tunable gain dynamics in a semiconductor optical amplifier and optical thresholding. The measured jitter tolerance is up to ±50 ps or ±25 ps for the AND/NOT gate.

© 2013 Optical Society of America

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