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Accuracy Enhancement of Sub-mm Chip Self-Alignment Using Liquid Surface Tension for Hybrid Integration

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Abstract

A self-alignment process of sub-mm chips is studied for hybrid integration toward silicon photonics applications. Capillary forces by liquid surface tension drive the tiny chips to precisely and quickly align on silicon wafers. Self-alignment behaviors and the resulting high accuracies of the sub-mm chips are discussed in this work.

© 2016 Optical Society of America

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