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Real-time FPGA Verification for 25G-PON and 50G-PON LDPC Codes

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Abstract

Employing 75-piece FPGA implementation, we investigate the performance down to 10-15 BER of hard-decision 25G-PON LDPC and soft-decision 50G-PON LDPC at a record 90Gbps throughput. FPGA emulations reveal soft-decision LDPC code offers more than 1.5dB coding gain with no error floor. © 2020 The Author(s)

© 2020 The Author(s)

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