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Integrated Optoelectronic Receivers for Intra-Chip Communication

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A significant and underutilized advantage of optical interconnection is the advantage of voltage isolation. Voltage isolation of transmit and receive nodes has potential to speed up any system which requires electrical fanout such as a clock distribution parallel broadcast system or DRAM architecture. The advantage of this approach has been shown theoretically by Pappu and Apsel in [1]. In this work, a comparison of voltage supply invariant performance for the two networks shown in figures 1 and 2 is performed. The figures show how fanout of signals to many nodes is performed electrically (with design of optimal drivers and optimal repeater insertion) and how the same electrical load can be subdivided with a layer of optical fanout to improve latency. Since the cost in the optical system of improved latency is the increased power required from the transmitter, analysis of both power and latency is performed. The analytical results shown in figure 3 to the left that include repeater insertion in both systems as well as the effect of wiring parasitics show that by using both the voltage isolation properties of optical signaling and the raw improvement in latency in the presence of parasitics that optical signaling also provides, there is a case for using optical interconnect at very short distances and even on- chip. The metric used in this figure is Ex1 2 3, a voltage supply invariant metric used in architectural comparisons. E is the energy of the systems, while x is the latency. Figure 3 shows that with as little optical fanout as a fanout of four, the break-even load at which for the same supply voltage the latency is equivalent in both systems is as little as 250 minimum sized inverters, independent of process. Not only is this more than an order of magnitude less than what is typical in a DRAM or clock distribution line, but in a 0.25 um process, shown in figure 3, the minimum distance that this corresponds to is 1.25mm, much less than the previous results for point to point interconnect [2]. This is a very exciting result in that it shows conclusively that even at distances as short as 2mm, there are performance advantages to using optical interconnect in various CMOS system architectures!

© 2005 Optical Society of America

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