Abstract

Fiber Sagnac switches have a demonstrated potential as ultra-high speed demultiplexers^[1,2]. Taking advantage of the properties of birefringent fiber^[3], we have recently demonstrated a Sagnac demultiplexer which displayed a high tolerance to timing jitter^[4] at the control port. The circuit was then configured so that the reflected output of the device was amplified and used in feedback as the control signal^[5]. This circuit implemented a recirculating clocked shift register with an inverter (Fig. la without the probe), thus demonstrating the cascadability of Sagnac logic gates. The storage is provided by the propagation delay through the loop and the feedback path. The bit pattern which is stored in the loop is inverted after every pass, as illustrated in Fig. lb.

© 1992 IQEC