Abstract

Future silicon microelectronics technology will require nanoscale components to achieve ultra large scale integration. The reduction to nanometer scale sizes will be dependent on processing that can be controlled at the atomic level and conformally deposit into high aspect ratio structures. The Si/SiO₂ interface is central in silicon technology. Controlled and conformal deposition of SiO₂ dielectric layers will be crucial for the fabrication of MOS gate oxides as thin as 50 Å and high aspect ratio trench capacitors in DRAM. Both requirements can be inherently achieved by the technique known as atomic layer epitaxy (ALE)¹ or atomic layer processing (ALP) if the deposited film is not epitaxial.

© 1995 Optical Society of America