Abstract

A cellular logic processor (CLP) has one processing element or cell for each pixel of an image. It can implement many image processing and computer vision operations with a very high degree of parallelism. In electronics, the connections between cells are usually on a nearest-neighbor (4-neighbors or 8-neighbors) basis only. In optics, the increased interconnection flexibility may permit the construction of other topologies, such as cellular hypercubes and pyramids. These topologies can substantially reduce computation time for global tasks, e.g., summing and regional property computation, histogramming, and transforms. Incorporating some of these into the CLP architecture so that they can be implemented at the hardware level can yield the greatest speed advantage. This may result in cells that are not all identical, or in additional PEs which do not correspond to image pixels. The resulting architectures and their possible implementation with optical hardware will be discussed. This optical hardware can include volume holographic elements to maximize the number of interconnections and to take advantage of regularity in the interconnection. Volume holograms may also incorporate focal power, thereby reducing or eliminating the number of lenses needed. The holograms may be recorded optically by using an automated system under computer control, or by optically copying a computer-generated hologram, or by a combination of both methods. Resulting characteristics of the optical system are discussed.

© 1985 Optical Society of America