Abstract

Optically interconnected VLSI and wafer-scale integrated (WSI) systems require that sensitive detectors for optical input of logic and timing signals be integrated with functional circuitry. Although custom processing steps for detectors can be justified for high-performance systems, it is preferable to exploit fully the capabilities of standard fabrication processes before resorting to measures that increase cost and reduce yield. Also, standard detector building blocks are needed that can be incorporated into prototype designs so that concepts in optically interconnected systems can be demonstrated. We have designed and fabricated through MOSIS¹ various detector circuits in 3-µm silicon p-well CMOS technology that convert single-ended or differential input light intensities to CMOS logic levels. Photoelements are vertical n-p-n transistors or stacked-junction p-n diodes that can be specified as unorthodox combinations of CMOS doping steps. The stacked-junction photodiode is designed to reduce the detrimental effect on turn-off time of charge carriers excited deep within the substrate by near-infrared input light. Differential elements allow operation in a dual-rail signal mode, which improves noise immunity, reduces sensitivity to variations in input light power, and is compatible with light modulator technologies such as the symmetric SEED.² Input threshold sensitivities range from 8.5 µW for a single-ended photodiode detector to 25 pW for a differential phototransistor detector.

© 1989 Optical Society of America