Abstract

The use of polarization-encoded optical shadow-casting (POSC)¹ for designing sequential logic circuits has been minimal. To date, only one POSC based sequential logical unit, a J-K flip-flop (FF)² has been reported in the literature. Since the POSC technique possesses some important advantages when compared with other optical implementation techniques, it is important to investigate the use of this technique for the design of sequential logic circuits such as a multiple-bit optical register. In the current work, we design a toggle FF, and then a 2-D parallel-in parallel-out n × n-bit optical register is designed using the Toggle FFs. The coded input patterns are placed in perfect contact at the input overlap plane and illuminated by an LED. The subsequent outputs are detected at the output overlap plane by a n × n detector array (e.g., CCD detector array). Since the next state of the register is a function of its present state, the present state inputs (i.e., the feedback inputs) are fed back to the encoder from the detector array by an optical fiber cable containing n² fibers.

© 1991 Optical Society of America