Abstract

To overcome clock-skew and other optical interconnect implementation problems, a ring-array processor distribution and interconnect topology has been proposed. In this paper, advantages of using an optical ring interconnect for digital electronic SIMD array processing are addressed. Design issues, such as tradeoff between array size and speed/power consumption, between parallel and multistage implementation, aberration correction, implementation complexity vs network topology, etc. are presented. Optical simulations of a small size (thirty-six nodes) optical ring network with LED sources and Si PIN diode arrays are experimentally demonstrated.

© 1991 Optical Society of America