FPGA Verification of a Single QC-LDPC Code for 100 Gb/s Optical Systems without Error Floor down to BER of 10−15

Deyuan Chang; Fan Yu; Zhiyu Xiao; Yang Li; Nebojsa Stojanovic; Changsong Xie; Xiaozhong Shi; Xiaogeng Xu; Qianjin Xiong

doi:10.1364/OFC.2011.OTuN2

Optical Fiber Communication Conference/National Fiber Optic Engineers Conference 2011
OSA Technical Digest (CD) (Optica Publishing Group, 2011),
paper OTuN2
•https://doi.org/10.1364/OFC.2011.OTuN2

FPGA Verification of a Single QC-LDPC Code for 100 Gb/s Optical Systems without Error Floor down to BER of 10⁻¹⁵

Deyuan Chang, Fan Yu, Zhiyu Xiao, Yang Li, Nebojsa Stojanovic, Changsong Xie, Xiaozhong Shi, Xiaogeng Xu, and Qianjin Xiong

Optical Fiber Communication Conference 2011

Los Angeles, California United States
6–10 March 2011
ISBN: 978-1-55752-906-0

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Real Time DSP Subsystems (OTuN)

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D. Chang, F. Yu, Z. Xiao, Y. Li, N. Stojanovic, C. Xie, X. Shi, X. Xu, and Q. Xiong, "FPGA Verification of a Single QC-LDPC Code for 100 Gb/s Optical Systems without Error Floor down to BER of 10−15," in Optical Fiber Communication Conference/National Fiber Optic Engineers Conference 2011, OSA Technical Digest (CD) (Optica Publishing Group, 2011), paper OTuN2.

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Abstract

We present FPGA-based emulation results of a single QC-LDPC code with 20% redundancy designed for applications in 100 Gb/s optical transmission systems. Error floor-free transmission can be achieved at BER of 10⁻¹⁵with a Q factor of 5.9 dB.

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