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Conferences > OFC > 2021 > Tu1K > Tu1K.3

20 Gb/s WDM Optical RAM Row Architecture based on four Monolithic Integrated InP Memory Cells

Theoni Alexoudi, Konstantinos Fotiadis, George Mourgias-Alexandris, Nikos Pleros, and Christos Vagionas

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Abstract

A complete 4-bit WDM-enabled all-optical RAM Row architecture with 20 Gb/s memory-bus throughput is experimentally presented for the first time, using four 5Gb/s monolithic InP Flip-Flops and a multi-wavelength Random Access and Column Selector peripheral circuit.

© 2021 The Author(s)

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