Abstract

Optical computing systems constructed with relatively slow logic devices and massively parallel configurations could have very high processing rates. For this reason, great attention has been paid on circuits based on lower power, moderate speed, nonlinear interference filter logic devices. Single-gate full-adder was proposed and realized by B.S.Wherrett et al[1,2]. In their experiment, input signals were input with an incident angle. Here we report the experimental demonstration of a single gate full-adder with on-axis input and put forward a design of multi-bit full-adder.

© 1989 Optical Society of America