Abstract

The lack of practical multiple-valued logic devices has in the past discouraged extensive investigation into multiple-valued logic. Recently, however, a number of optical processors have been presented to perform either multiple-valued logic functions[1,2], modified signed-digit arithmetic[3], or residue arithmetic[4]. Most of these implementations utilize position coding for the representation of residue numbers or multiple-valued numbers. For example, 9 pixels are needed to represent the combinations of two ternary inputs, and only one of the pixels will be turned ON at a time. As a result, the spatial utilization of input SLM (spatial light modulator) plane is quite low. In this paper, a new ternary number representation, which make use of both intensity and polarization codings, is proposed to perform both ternary logic operations and modified signed-digit arithmetic. The advantages of this system are that only one pixel is used to carry 1-bit information, and the conventional optical logic array[5] and SLMs, which are designed for binary system implementation, can be used in the proposed ternary system.

© 1988 Optical Society of America