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InP/InGaAs DHBTs Technology for Single-Chip 20-Gbit/s Regenerative Receiver Circuits with Extremely Low Power Dissipation

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Abstract

An ultrahigh-speed monolithic regenerative receiver IC is successfully fabricated by using self-aligned InP/lnGaAs DHBTs with a hexagonal emitter. An InxGa1-xAs graded base, an InGaAs/InP composite collector, and an InP subcollector layer are characteristic of these DHBTs, which have excellent performance: peak fT of 183 GHz and fmax of 235 GHz. The receiver IC is constructed with a pre-amplifier, post-amplifier, automatic offset controller, PLL-based timing recovery circuit, and D-type flip-flop. A 20-Gbit/s error-free operation is achieved with an extremely low power dissipation of 0.6 W at -5 V supply. This is the first demonstration of a single-chip 20-Gbit/s receiver IC having such a low power dissipation.

© 1997 Optical Society of America

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