Abstract

Although many researchers have proposed optical solutions to interconnection and communication problems at the chip, board, and backplane levels, the integration of fast photodetectors within a silicon chip package has yet to be accomplished. The development of such devices is crucial to the feasibility of optical interconnection at hierarchical levels below backplane connection. In our photodetector design, the much faster drift photocurrent response for reverse-biased shallow p-n junctions is emphasized over the slower diffusion response by confining a higher percentage of photon absorption to the depletion region of the junction than expected for normal light propagation in the silicon substrate. A surface-relief grating structure diffracts light at the Si-SiO₂ interface to cause propagation at large angles from the surface normal. Since the absorption length for photons in the silicon is measured along the ray path, the average depth beneath the surface at which photons are absorbed to generate carriers for photocurrent is reduced, generating a higher percentage of carriers in the depletion region of the junction where drift effects dominate diffusion effects in carrier transport. The resulting drift photocurrent can be orders of magnitude faster in response than the usual diffusion photocurrent which results if light propagates normal to the silicon surface and absorption of a large number of photons occurs far away from the effects of the electric field present at the diode junction. We report simulation studies that indicate etched gratings of the order of 0.2 μm deep in the silicon surface can diffract an appreciable amount of light away from normal propagation in the silicon.

© 1989 Optical Society of America

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