Demonstration of a low-power, local-oscillator-less, and DSP-free coherent receiver for data center interconnects

Rashmi Kamran; Nandakumar Nambath; Sarath Manikandan; Rakesh Ashok; Rachit Jain; Nandish Bharat Thaker; Shalabh Gupta

doi:10.1364/AO.383185

Applied Optics
Vol. 59,
Issue 7,
pp. 2031-2041
(2020)
•https://doi.org/10.1364/AO.383185

Demonstration of a low-power, local-oscillator-less, and DSP-free coherent receiver for data center interconnects

Rashmi Kamran, Nandakumar Nambath, Sarath Manikandan, Rakesh Ashok, Rachit Jain, Nandish Bharat Thaker, and Shalabh Gupta

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Rashmi Kamran, Nandakumar Nambath, Sarath Manikandan, Rakesh Ashok, Rachit Jain, Nandish Bharat Thaker, and Shalabh Gupta, "Demonstration of a low-power, local-oscillator-less, and DSP-free coherent receiver for data center interconnects," Appl. Opt. 59, 2031-2041 (2020)

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- Fiber Optics, Fiber Sensors, and Optical Communications
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About this Article
History
- Original Manuscript: November 14, 2019
- Revised Manuscript: January 22, 2020
- Manuscript Accepted: January 22, 2020
- Published: February 25, 2020

Abstract

Performance limitations of currently employed four-level pulse amplitude modulation links and high power consumption of digital signal processing (DSP)-based coherent links for further increase in capacity create an urgent demand for low-power coherent solutions for short-reach data center interconnects. We propose a low-power coherent receiver with analog domain processing for a self-homodyne link. To validate the proposed scheme, a 10 GBd polarization multiplexed carrier-based self-homodyne quadrature phase-shift keying system with a constant modulus algorithm-based equalizer chip is experimentally demonstrated. Also, energy consumption per bit estimates show that the proposed approach results in significant power reduction in comparison with conventional DSP-based solutions.

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$\| x_{e q} \|^{2} > c_{1}^{2}$	$\| x_{e q} \|^{2} > c_{2}^{2}$	Radius
0	0	$r_{1}$
0	1	NA
1	0	$r_{2}$
1	1	$r_{3}$

Attribute (pJ/bit)	DP-QPSK (DSP) 200 Gb/s	DP-QPSK (ASP) 200 Gb/s	SH 16-QAM (ASP) 200 Gb/s	PAM4 (DSP) 100 Gb/s
$E_{l a s e r}$	2.25	2.25	2.25	4.5
$E_{p u l}$	11.2	11.2	7.53	7.53
$E_{d a c}$	12.48	12.48	7.8	7.8
$E_{m o d}$	16	16	8	16
Transmitter	41.93	41.93	25.58	35.83
$E_{L O}$	2.5	2.5	—	—
$E_{R r}$	6.1	6.1	3.05	—
$E_{p d}$	—	—	0.66	1.23
$E_{a d c}$	20	—	—	6.25
$E_{c d - D S P}$	88.94	—	—	50.03
$E_{p m d - D S P}$	27.69	—	—	—
$E_{c r - D S P}$	23.3	—	—	—
$E_{c h i p}$	—	15	7.5
$E_{p o l - c o n t r o l}$	—	—	5	—
Receiver	168.53	23.6	16.21	57.51
Total	210.46	65.53	41.79	93.34

$\| x_{e q} \|^{2} > c_{1}^{2}$	$\| x_{e q} \|^{2} > c_{2}^{2}$	Radius
0	0	$r_{1}$
0	1	NA
1	0	$r_{2}$
1	1	$r_{3}$

Attribute (pJ/bit)	DP-QPSK (DSP) 200 Gb/s	DP-QPSK (ASP) 200 Gb/s	SH 16-QAM (ASP) 200 Gb/s	PAM4 (DSP) 100 Gb/s
$E_{l a s e r}$	2.25	2.25	2.25	4.5
$E_{p u l}$	11.2	11.2	7.53	7.53
$E_{d a c}$	12.48	12.48	7.8	7.8
$E_{m o d}$	16	16	8	16
Transmitter	41.93	41.93	25.58	35.83
$E_{L O}$	2.5	2.5	—	—
$E_{R r}$	6.1	6.1	3.05	—
$E_{p d}$	—	—	0.66	1.23
$E_{a d c}$	20	—	—	6.25
$E_{c d - D S P}$	88.94	—	—	50.03
$E_{p m d - D S P}$	27.69	—	—	—
$E_{c r - D S P}$	23.3	—	—	—
$E_{c h i p}$	—	15	7.5
$E_{p o l - c o n t r o l}$	—	—	5	—
Receiver	168.53	23.6	16.21	57.51
Total	210.46	65.53	41.79	93.34

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