Abstract
We propose a novel structure of a mode (de)multiplexer that realizes an on-chip (de)multiplexing function in a two-step process consisting of a bridged coupler and an oval mode converter. According to the two-step principle, we design and fabricate a three-mode (TE0, TE2, and TE4) (de)multiplexer with the standard silicon-on-isolator (SOI) technology. The measured crosstalk of the device is lower than −22.0 dB, −19.0 dB, and −16.0 dB for TE0, TE2, and TE4 modes, respectively, for wavelengths ranging from 1525 to 1585 nm. The device is tested in both single-wavelength and wavelength-division multiplexing (WDM) systems with 128 Gb/s (32 Gbaud) 16-ary quadrature amplitude modulation signals. We experimentally demonstrate 96-channel (
${\text{32}}-{\text{wavelength}}\times {\text{3}}-{\text{mode}}$
) on-chip WDM and mode-division multiplexing (MDM) transmission. Considering a single lane bit rate of 128 Gb/s, an on-chip data capacity of ∼10 Tb/s is achieved. To our best knowledge, this paper is the first demonstration of a Terabit on-chip WDM-MDM system that shows ultrahigh bandwidth communication on a single silicon chip.
© 2018 IEEE
PDF Article
More Like This
Ultra-compact silicon mode (de)multiplexer based on directional couplers with subwavelength sidewall corrugations
Xiaofei Wang, Hui Yu, Qiang Zhang, Zhilei Fu, Penghui Xia, Qikai Huang, Nannan Ning, Zhujun Wei, Yuehai Wang, Xiaoqing Jiang, and Jianyi Yang
Opt. Lett. 47(9) 2198-2201 (2022)
Cited By
You do not have subscription access to this journal. Cited by links are available to subscribers only. You may subscribe either as an Optica member, or as an authorized user of your institution.
Contact your librarian or system administrator
or
Login to access Optica Member Subscription