Silicon photonics has recently emerged as a leading technology beyond its initial intended market of optical interconnects to additionally include diverse applications, such as lidar, deep learning accelerators, medical sensors, and quantum computers. To address all of these markets with a standardized, general-purpose process, the majority of leading foundries have converged on sub-micron silicon-on-insulator (SOI) platforms with typical silicon device layer heights ranging from 220 nm to 310 nm [1,2]. To maintain single-mode operation with these heights, typical waveguide widths range from $\approx 300$ nm for O-band ($\lambda = 1310$ nm) to $\approx 450$ nm for C-band ($\lambda = 1550$ nm). All of the aforementioned applications rely on the standard integrated photonics toolbox of devices, of which the main workhorses are resonators and interferometers. However, in sub-micron SOI processes, the performance of these devices is highly susceptible to minute changes in the waveguide width and height of the order of a few nanometers. While sensitivity to silicon thickness variations cannot be mitigated, since the waveguide height dimension is fixed by the process, the waveguide width is lithographically defined and is thus a degree of freedom. It is well known that wider waveguides are less susceptible to variations in width [3]; however, this is at the expense of supporting undesirable higher-order modes and thus it was previously thought that these wide waveguides could only be used to reduce phase errors in long, straight sections of devices [3,4]. However, it is possible to maintain pure single-mode operation for wide multi-mode waveguide bends in sub-micron processes by adiabatically varying the radius of curvature to ensure that the modal discontinuities are minimized and thus higher-order modes remain unexcited. Since wide waveguides have the additional benefit of reduced propagation losses, owing to less overlap between the optical mode and rough sidewalls, previous work with wide multi-mode waveguides operating in the single-mode regime with adiabatic bends has focused on enabling ultrahigh quality factor ($Q$) resonators, rather than fabrication-robust devices [5–7]. Previous work in thick silicon processes ($>\!1\,\mathrm{\mu}$m) has demonstrated the use of adiabatic curves to reduce the excitation of higher-order modes in bends [8] and, in general, thick silicon processes are more fabrication-robust than sub-micron processes, but they are far less commonly used and are restricted to a few highly specialized foundries [9,10].

In this work, we employ Euler curves (also commonly referred to as clothoid curves [11]) with wide multi-mode waveguides in a standard 220 nm silicon photonics platform to show that complex single-mode devices with compact bends and resonators can be constructed using fabrication-robust wide waveguides without degradation in performance or increase in footprint. We demonstrate fabrication-robust dense wavelength-division multiplexing (DWDM) ring-assisted Mach–Zehnder interferometer (RAMZI) interleavers as a representative proof-of-principle device with state-of-the-art performance and footprint. Furthermore, we provide a comprehensive design space exploration using finite-difference eigenmode (FDE) and rigorous 3D finite-difference time domain (FDTD) simulations to examine the trade-offs in Euler bend designs for different widths and identify target design points. Finally, we fabricated RAMZI devices using electron beam (e-beam) lithography in a university clean room setting, as well as deep ultraviolet (DUV) lithography in a commercial 300 mm foundry, demonstrating the universality of the methodology and its natural compatibility with high-volume fabrication. This demonstrated general design methodology illuminates an appealing path toward large-scale silicon photonic circuits that require substantially less thermal tuning power to correct for stochastic phase errors, when compared with conventional designs.

For sub-micron SOI waveguides with a fixed height of 220 nm, we first use FDE simulations to explore the relationship between nominal waveguide width and sensitivity to width variations. Figure 1(a) shows the sensitivity in effective refractive index ($n_\mathrm {eff}$) of various waveguide geometries to variations in width. The simulated width variations of $\pm 10$ nm are well within the $3\sigma$ values for wafer-scale measured data from dedicated silicon photonics foundries [1,2]. Since the curves from Fig. 1(a) are linear, the sensitivities $\partial n_\mathrm {eff} / \partial w$ are constant and are plotted in Fig. 1(b) as a function of nominal width. From these simulations, it is clear that the widely used conventional single-mode waveguides ($w = 400$–$500$ nm) are highly sensitive to width variations, with a sensitivity of 3 $\times 10^{-3}$ nm$^{-1}$ at $w = 400$ nm ($\lambda = 1550$ nm). However, we can also see that, through using wider waveguides, this sensitivity can be dramatically reduced by over two orders of magnitude, to $2.5 \times 10^{-5}$ nm$^{-1}$ for $w = 2000$ nm. This advantage comes with a caveat, as wide waveguides begin to support a plethora of higher-order spatial modes. The first four transverse electric (TE) modes of a $2000 \times 220$ nm SOI waveguide are shown in Fig. 1(c), with their corresponding effective indices. In typical devices and circuits, it is highly undesirable to excite these modes through parasitic conversion of light from the fundamental mode, as it results in increased losses and degraded performance. Since the dominant source of this parasitic conversion is in waveguide bends, it is standard to only use wide waveguides in long, straight sections with tapers on both ends to interface with the single-mode waveguides used in the rest of the circuit. However, as mentioned previously, through careful design of the bends for adiabatic mode propagation, the entire circuit can employ wide waveguides without degrading performance and without the need for tapers. While Euler curves were chosen here since their radius of curvature varies linearly along the path length and thus naturally satisfies the condition of adiabatic mode propagation, in principle, other classes of adiabatic non-radial curves can be chosen (such as trigonometric functions [5] or Bézier curves [12]) to similarly achieve single-mode operation. A full comparison of curvature functions is outside the scope of this work, but the choice of curve is likely to be highly application-specific, owing to the inherent trade-offs between loss, footprint, and higher-order mode suppression. An additional important consideration when choosing width for broadband applications is the total dispersion experienced by the target guided mode, which is influenced by both material dispersion and waveguide dispersion. For oxide-clad silicon waveguides with 220 nm height, we find from FDE simulations that minimum dispersion occurs around 640 nm width and worsens monotonically as the width is increased further. This presents an application-dependent design choice, as Fig. 1(b) shows that wider waveguides beyond this point are more robust to fabrication variations, but this comes at the expense of experiencing higher dispersion.

 

Fig. 1. (a) Simulated effective refractive index ($n_\mathrm {eff}$) of fundamental TE mode as a function of width variation for various nominal widths. Insets: Corresponding simulated fundamental mode profiles for the circled widths. (b) Sensitivity of $n_\mathrm {eff}$ to width variations as a function of nominal width. Inset: Identical data plotted on a logarithmic scale. (c) Simulated mode profiles for the first four supported modes of a $2000 \times 220$ nm SOI waveguide. Note that all simulations are for $\lambda = 1550$ nm; different wavelengths will experience marginally different sensitivities following the same trend line.

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In Cartesian coordinates, a radial bend is parameterized by the relation $x^{2} + y^{2} = R^{2}$, where $R$ is a constant radius of curvature. In contrast, Euler bends have a radius of curvature that varies linearly along the path length, defined by the Fresnel integrals [12,13]

 

Fig. 2. (a) Simulated field profile for radial bend with $R = 14\,\mathrm{\mu}$m and $w = 1200$ nm (Insets: mode profiles at the input and output) and its corresponding scattering parameters for transmission into the first two supported modes. (b) Simulated field profile for an Euler bend with $R_\mathrm {eff} = 14\,\mathrm{\mu}$m ($w = 1200$ nm) and its corresponding scattering parameters. (c) Simulated TE₀ $\rightarrow$ TE₀ transmission as a function of $R_\mathrm {eff}$ for 800 nm and 1200 nm wide waveguides.

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For our devices, we chose a nominal waveguide width of 1200 nm to obtain an optimal balance between robustness to fabrication variations and dispersion for broadband applications. The average measured dispersion for these waveguides was approximately 1000 ps/(nm$\cdot$km) at 1550 nm, which agrees well with simulation. Both MMIs maintain this width for all ports with center-to-center waveguide spacing of 1.8 $\mathrm{\mu}$m; the 89–11 MMI has body dimensions of 3.5 $\mathrm{\mu}$m $\times$ 21.6 $\mathrm{\mu}$m and the 50–50 MMI has body dimensions of 3.5 $\mathrm{\mu}$m $\times$ 43.1 $\mathrm{\mu}$m. The footprint of the entire structure is only 0.02 mm² (Fig. 3). Both the foundry-fabricated and e-beam devices display performance comparable to the state of the art in terms of footprint, cross talk, bandwidth, and passband shape [15] (Fig. 4). The foundry-fabricated devices were taped out as part of the AIM Photonics 300 mm multi-project wafer (MPW) run [2]. Since the dies were singulated prior to shipping, the exact location of each die on the wafer was unknown and thus we were unable to control for height variations across devices. Thus, the statistics shown in Fig. 5 are agnostic to die location and therefore include the effects of both height and width variations. Nevertheless, it is still clear that the wide waveguide devices display substantially less stochastic phase error than the nominal width designs.

 

Fig. 3. (a) Annotated mask layout of e-beam device. (b) Layout of foundry-fabricated device. (c) Optical micrograph of e-beam device. (d) Optical micrograph of foundry-fabricated device. All shown waveguides used in both devices are 1.2 $\mathrm{\mu}$m wide.

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Fig. 4. (a) Experimentally measured spectrum for e-beam device, displaying flattop passbands, and stop bands with typical cross talk of $-20$ dB and worst-case cross talk of $-12$ dB. (b) Measured spectrum for foundry-fabricated device, with comparable passband and stop band flatness and cross talk suppression ratios. Note that, for the foundry-fabricated device, the ideal transmission band is blueshifted $\approx$20 nm, which is probably due to etch bias in the MMI body and necessitates re-zeroing.

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Fig. 5. Measured statistical variation in $n_\mathrm {g}$ across 14 standard-width and 14 wide devices. The standard-width devices use a single-mode width of 480 nm with radial bends, while the wide devices employ 1200 nm wide waveguides with Euler bends. The wide devices show nearly an order of magnitude reduction in standard deviation ($\sigma$).

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In summary, we have demonstrated a design methodology that greatly reduces stochastic phase errors in phase-sensitive silicon photonic devices without any process changes. Through mitigating the phase errors at the design stage, this approach is fully passive and inherently high-throughput, as it does not require any post-processing steps, such as trimming. Furthermore, the platform can naturally be integrated with ultrahigh efficiency phase shifters, such as thermal undercut heaters [20] or heterogeneous III–V/Si metal-oxide-semiconductor capacitor (MOSCAP) structures [15]. Beyond the demonstrated RAMZI devices, previous work has shown that ring resonators based on wide multi-mode waveguides display dramatically reduced sensitivity to fabrication variations [21]. Through applying the methodology of this work along with careful design of the bus-ring coupling, low-loss, fabrication-robust, and compact single-mode resonators can be realized. We envision that these results will influence the design of silicon photonic circuits across a broad application space, resulting in large-scale systems with dramatically reduced energy consumption compared with previous standards.