1. INTRODUCTION

The notion of using the superior quality of wafers and advanced processing capabilities developed and funded by the microelectronics industry in the field of photonics is not new. Silicon photonics research and development started more than 30 years ago and has significantly intensified in the last 15 years as the complexity of commercial devices and their market volumes have increased significantly. Silicon offers many advantages as an optical material but lacks one key element for complete wafer-scale integration: an efficient electrically pumped laser. The problem was elegantly solved by the University of California, Santa Barbara [1] with the development of heterogeneous integration and commercialized by Intel at multimillion per annum scale providing unprecedented uniformity and scale [2]. Heterogeneous silicon photonics provide a state-of-the-art photonic platform with 300 mm wafers and unmatched lithography but is limited in wavelength of operation to ${ \gt }{1.2}\;{\unicode{x00B5}{\rm m}}$ as waveguiding is performed in silicon.

There is a broad demand to expand the wavelength range of operation to much shorter wavelengths, all the way to 400 nm or lower for e.g., displays, AR/VR, quantum related technologies or general metrology and spectroscopy including bio-sensing. Many demonstrations have utilized photonic integrated circuits (PICs) based on silicon nitride (SiN) [3], lithium niobate (${{\rm LiNbO}_3}$) [4], tantalum pentoxide (${{\rm Ta}_2}{{\rm O}_5}$) [5], aluminum nitride (AlN) [6], aluminum oxide (${{\rm Al}_2}{{\rm O}_3}$) [7] or other suitable materials with large bandgap energy to address the short wavelength range. However, in all these demonstrations lasers were either externally coupled or assembled in a process that does not scale to large volumes and low cost necessary for wide deployment. To address the new emerging markets, a wafer-scale process providing on-chip sources and amplifiers to common passive platforms operating down to 400 nm wavelength is needed–preferably one that can easily be transferred to a state-of-the-art fabrication facility.

2. VISIBLE TO IR PHOTONIC PLATFORM WITH ON-CHIP LIGHT SOURCES

We have developed a novel photonic integration platform covering visible to IR wavelength range, with a proprietary optical coupling scheme between common passive materials (typically characterized by lower refractive index) and common active materials for optical amplification, detection and modulation (typically characterized by higher refractive index). In addition, this approach, which does not require intermediate layers such as silicon as used in [8,9], enables utilization of the full transparency range of the passive waveguide material without being limited by the bandgaps of those intermediate layers.

The fabrication process is based on a wafer-scale heterogenous photonics flow including low-temperature wafer bonding, depositions and etching steps which are CMOS-compatible. The alignment between passive and active regions is defined by high-throughput lithography tools, which typically produce an accuracy level better than 100 nm resulting in high uniformity in device performance. Efficient coupling is enabled with no need for thin layers in the high-index region or prohibitively narrow taper tips to match the modes and their effective indices.

In the first demonstration, we use SiN for waveguiding as it is a standard CMOS material that simplifies the transition to foundry fabrication, and we heterogeneously integrate GaAs lasers and photodetectors which requires efficient optical coupling between materials with refractive index difference ${ \gt }{1.5}$. Typical fundamental modes for SiN passives and GaA laser waveguides are shown in Fig. 1(a). Our SiN waveguides, in this demonstration, are fundamentally single TE mode with thickness of ${\sim}{350}\;{\rm nm}$ supporting efficient passive components. The coupling scheme can support other SiN thicknesses. General processing starts with passives that are processed prior to bonding dies/wafers of active material, substrate removal and processing of active structures followed by back-end steps. Thickness of active layers, after substrate removal, is ${\sim}{2}\;{\unicode{x00B5}{\rm m}}$ and incorporates InGaAs quantum wells supporting vertical current injection with no regrowth necessary. A completed 100 mm wafer with 16 dies is shown in Fig. 1(b).

 

Fig. 1. (a) Simulation of fundamental modes in GaAs laser and SiN waveguide (WG) and SEMs of corresponding regions. (b) Fabricated 100 mm wafer. (c) Coupling efficiency Monte Carlo simulation at 900 nm. Within typical lithographic tolerance (${\sim}\;{ \pm 0.1}\;{\unicode{x00B5}{\rm m}}$), the loss variation is ${ \lt }{0.2}\;{\rm dB}$. (d) Transition loss in 400–1000 nm range. Design 1 targeted fully optimized performance, while Design 2 targeted simpler process flow.

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Fig. 2. (a) World’s first heterogeneous GaAs-on-SiN lasers coupled to passive SiN waveguide and routed to on-chip photodetector (PD) through an S-bend in passive waveguide during wafer-scale testing. (b) Lasing emission spectrum around 990 nm. (c) SiN waveguide coupled power of few identical lasers showing very high uniformity. Output powers are measured continuous wave at room temperature. (d) Measured and simulated coupling efficiency of 1st generation of lasers and simulations for improved designs.

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For an illustrative active-passive transition whose Monte-Carlo simulation tolerance is shown in Fig. 1(c), the overall coupling efficiency exceeds 80% with less than 0.2 dB variation when the misalignment between active and passive is up to ${ \pm 100}\;{\rm nm}$. Figure 1(b) shows exemplary coupling efficiencies simulated across a wavelength range of 400 nm to 1000 nm which can be covered by two different active materials, GaAs and GaN. In Fig. 1(d), we specify two transition designs, where Design 1 is optimized for performance (lower coupling loss) while Design 2 targets a simpler process flow and is used in the first laser demonstration below. A total loss ${ \lt }{0.5}\;{\rm dB}$ is achievable in the full wavelength range.

3. HETEROGENEOUS GAAS-ON-SIN LASERS

Arrays of lasers have been fabricated in our wafer-scale process and a closeup image is shown in Fig. 2(a). A typical test structure has a GaAs laser coupled to SiN waveguide and routed through an S-bend to an on-chip waveguide-coupled GaAs monitor photodetector (PD) to enable wafer-level device testing prior to more-in-depth bar-level device testing. A representative optical spectrum of the lasers is shown in Fig. 2(b) demonstrating operation around 990 nm, well below the Si bandgap. Light-current (LI) curves, measured at the SiN waveguide outputs, are shown in Fig. 2(c) and show high uniformity enabled by the consistent lithographically defined alignment between the active and passive regions. Waveguide-coupled output powers in these first-generation devices exceed 10 mW. The lasers are operated continuous-wave at room-temperature. The extracted coupling efficiency is measured by taking a ratio of output powers from two sides of the laser where one side is without the coupler and the other side has an active-passive transition. Figure 2(d) shows the extracted coupling efficiency from 21 coupler designs plotted into 3 design groups. The coupling efficiency from the best device is ${ \gt }{70}\% $ and the overall performance range from all the design skews is well-matched and within the simulated bounds. The coupler designs in the 1st generation are not optimal for the coupling efficiency as we aimed for process simplicity. The coupling efficiency can be further improved to ${ \gt }{90}\% $ as shown with simulations for fully optimized case in Figs. 1(d) and 2(d).

4. CONCLUSION

We have demonstrated the first heterogeneously integrated electrically pumped GaAs lasers and detectors coupled to SiN waveguides with very high device uniformity using wafer-scale process. The technology promises to revolutionize many fields including displays, volumetric light projection, AR/VR, PNT (positioning, timing and navigation), quantum sensing and computing by enabling wafer-scale manufacture of photonic integrated chips with on-chip sources using high-volume, high-quality CMOS facilities for ultimate SWaP-C improvement.