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We report on lateral pin germanium photodetectors selectively grown at the end of silicon waveguides. A very high optical bandwidth, estimated up to 120GHz, was evidenced in 10 µm long Ge photodetectors using three kinds of experimental set-ups. In addition, a responsivity of 0.8 A/W at 1550 nm was measured. An open eye diagrams at 40Gb/s were demonstrated under zero-bias at a wavelength of 1.55 µm.
©2012 Optical Society of America
1. Introduction
Implementation of fast optical links in integrated circuits is picking speed up in order to keep pace with the datacom and telecom roadmaps. For this purpose, the development of photonic building blocks based on silicon is occurring, with technological and scientific breakthroughs in the fields of light sources [1,2], modulators [3–5] and detectors [6–12]. Near infrared Photo-Detectors (PDs) have been investigated quite in depth the last decade, with high responsivity and high bandwidth. The efficiency of pure silicon photodetectors at telecommunication wavelengths (around 1.55µm) is low and inappropriate for high speed and high responsivity operation. As a result, germanium (Ge) has rapidly been considered for detection as its near IR absorption coefficient is much higher than that of silicon and comparable to that of InGaAs (reference material in III-V semiconductors). High speed and high responsivity germanium photodetectors have been fabricated in various research institutes [6–12]. Up to now, however the main drawback of Ge-on-Si photodetectors is the high dark-current, which limits its use for low power consumption circuits and degrades the signal-to-noise ratio. Indeed, the average value reported in the literature is about 1µA under −1V. This rather high dark current is due to the lattice parameter mismatch between Ge and Si (presence of numerous misfit dislocations in Ge) and a rather poor electrical quality of the contacts. Only few works have demonstrated zero-bias Ge detectors but in surface illuminated configuration [13]. This paper reports our recent progress on a zero-bias 40Gbit/s pin Ge photodiode integrated at the end of a Si waveguide using the butt coupling approach. Section 2 presents the fabrication of the germanium photodetector. The selective epitaxial growth of Ge which is the key in order to obtain a high quality Ge layer is reported in details followed by a description of the technological process used in a 200mm microelectronics pilot line. The last section reports on the experimental results of the pin Ge photodetector integrated in a Si waveguide.
2. Fabrication
Several issues have to be circumvented in order to fabricate high performance, near infra-red Ge PDs integrated at the end of silicon waveguide: (i) the several hundreds of nanometer deep recess at the end of optical waveguides have to be selectively filled with Ge, (ii) the Ge thickness has to be well controlled to have a good coupling between the Si waveguide and the Ge detector and (iii) the quality of the germanium layer grown on silicon has to be optimum to reduce dark current.
2.1 Selective Epitaxial Growth of Ge in recess at the end of optical waveguides
For the selective epitaxial growth of Ge in silicon recess, it is not advised to use a Si3N4 hard mask to define the cavity. Indeed, poly-Ge would be deposited on top of it (at least with GeH4 gaseous precursor, as it is used here). This is to some extent not the case with SiO2 (even with more than 1 µm thick Ge layers grown in the said recess). Low growth pressures (20–100 Torr) are otherwise expected to yield higher selectivity and should preferentially be used. With the butt coupling scheme, the floor of the cavities and the bottom parts of the sidewalls are made of Si. Meanwhile, the top part of the sidewalls is made of SiO2, the masking material (Fig. 1 ). Ge layers will then have to be thick enough to ensure a full filling of the silicon recess, where faceting might occur [14] (i.e. no deleterious air gap due to facets at that specific location). Thickness control is another troublesome problem. Severe global and local loading effects (i.e. increase of the growth rate when switching from blanket to patterned wafers, and, on patterned wafers, when moving from large, dense Si windows to small, isolated Si windows) are indeed expected with Ge Selective Epitaxial Growth (SEG) [15]. Finally, the crystalline quality of the Ge layer should be as high as possible (to reduce PD dark current), which is far from being trivial given the 4.2% lattice mismatch between Ge and Si. Threading dislocation densities, of the order of 5x107 cm−2 for more than 1 µm thick Ge layers grown on blanket Si(001) using a 400°C/750°C scheme, can be brought down by a factor of ~5 thanks to high temperature thermal cycling [16]. Care should however be paid to the thermal budget, as Ge-Si interdiffusion can occur, leading to SiGe alloy and thus to absorption losses [17].
Fig. 1 (a) 3D tapping mode Atomic Force Microscopy images of 10 µm x 10 µm, initially ~150 nm deep recess in bulk Si(001) surrounded by ~700 nm of SiO2 (which acts as a hard mask; overall cavity depth close to 850 nm), this at various stages of their filling with Ge using a {400°C, 100 Torr / 750°C, 20 Torr} process. Growth durations at those two temperatures are provided next to each image. Ge growth rates are ~45 nm min.−1 at 400°C and 260 nm min.−1 at 750°C. Poly-Ge nuclei on the SiO2 hard mask are clearly seen in the top right optical microscopy image of a 10 µm x 10 µm cavity at the end of an optical waveguide after its overfilling with Ge. For the right two images, a 1 hour H2 annealing at 750°C, 20 Torr was used after growth, as in actual photo-detectors. (b) <110> sections obtained from AFM images showing the flatness of the Ge layers grown at 400°C together with the appearance of <113> and high Miller indexes ({1110} etc) facets as soon as growth proceeds at 750°C. When Ge overflows from the cavity, {111} steeper facets are then present at the very edges of the resulting “hut-like” structure.
We thus typically proceed as follows. A dedicated surface preparation is first of all used to get rid of native oxide and contaminants on the cavities’ floors and Si sidewalls. GeH4 is then flown at 400°C at 100 Torr pressure in our 200 mm Applied Materials Epi Centura Reduced Pressure Chemical Vapour Deposition (RP-CVD) tool in order to accommodate, in a several tens of nm thick flat Ge layer, the lattice mismatch between Ge and Si. Although the growth front is as expected a bit rough [16], faceting is not present at that stage even when the growth time is 5 times larger than the time typically used (i.e. 300s instead of 60s). This is clearly illustrated by the top two 3D Atomic Force Microscopy (AFM) images of Fig. 1a and the bottom two sections of Fig. 1b. Temperature is then slowly ramped-up (2.5°C/s) to 750°C, at which the remainder of the Ge layer is grown in a few minutes (at 20 Torr). {111}, {113} and higher Miller index faceting is then present at the cavity edges, as illustrated by the bottom 3D AFM images of Fig. 1a and the top three sections of Fig. 1b. Ge overflow from the recess (i.e. more than 1 µm layers, typically; rightmost two images of Fig. 1a) is aimed for, in order to suppress coupling issues and reduce the defect density, which has been shown to exponentially decrease with the deposited thickness [18,19]. Thermal annealing at 750°C for 1 hour or very short thermal cycling between 750°C and 890°C is then performed under H2 just after growth in order to further reduce the defect density without deleterious GeSi alloying. Finally, Chemical Mechanical Polishing (CMP) is used in order to (i) get rid of the excess Ge at cavity locations and (ii) remove the poly-Ge nuclei present on the surrounding SiO2. The imperfect selectivity is likely due to the use here of an initially 800 nm thick SiO2 layer deposited at 520°C then polished down to 700 nm, whose resulting surface is apparently of lesser quality than thermally grown SiO2. Furthermore, a specific growth rate calibration is mandatory each time the lithography mask layout is changed due to strong loading effects. Indeed, for the F(GeH4)/F(H2) mass-flow ratio (2.5x10−4) used in this work, Ge growth rates were for 10 µm x 10 µm windows 16-17 times those on blanket wafers, with ~45 and 260 nm min.−1 growth rates at 400°C and 750°C, respectively. Loading effects in similar dimension cavities but other chip designs were found to be in the 10 - 60 range.
2.2 Fabrication of the waveguide Ge detector
The process used in this work is compatible with CMOS technology. First, the silicon waveguides were fabricated using 193nm Deep-UV lithography followed by HBr dry etching. Its geometry was the following: the height was 220nm, the width was 500nm. A 10µm long silicon recess was etched at the end of the waveguide down to a thin silicon layer of about 50nm. Ge was selectively grown by RP-CVD in the Si cavity using the process described in sub-section 2.1. After CMP, a silica layer was deposited and a self-aligning process was used to perfectly define n-type and p-type doped regions, that were implanted with phosphorous and boron ions, respectively. Rapid thermal annealing was subsequently used to activate the dopants. A 1µm thick SiO2 was deposited and planarized before etching 400nm diameter vias in it. These vias were filled with TiNW and planarized in order to get W plugs. A Ti/TiN/AlCu metal stack was deposited on this flat surface and lithography together and Cl2 etching were used to fabricate metallic contacts. A schematic view of the lateral photodiode is presented in Fig. 2a . Top view optical microscopy and cross-sectional Scanning Electron Microscopy (SEM) images of the Ge photodetector at the end of the Si waveguide are shown in Figs. 2b and 2c. The doped region spacing (i-Ge width) design was 500nm.
Fig. 2 (a) Schematic view of a lateral pin Ge photodetector integrated at the end of a Si waveguide. The length was 10 µm. (b) Top-view Optical Microscopy and cross-sectional SEM images of the Ge PD. (c) SEM cross-section (perpendicular to the waveguide direction).
3. Results
The dark current of the Ge photodetector is about 4 µA at a bias voltage of −1V leading to a high dark current density of 80 A/cm2. This value, rather high compared to a previous paper of ours [6], was probably due to dopant diffusion during thermal annealing. However, this dark current only increased by a factor of 2 with temperature increased from 25°C to 90°C.
The optical responsivity of the Ge photodetector was measured at a wavelength of 1.55µm using a reference waveguide to estimate the injected power as described in Ref. [6]. A responsivity of 0.8 A/W at a wavelength of 1550nm was measured, as shown in Fig. 3 . Saturation value was already obtained at 0.1V, showing a good collection efficiency of photo-generated carriers. At zero-bias, the responsivity is still as high as 0.78 A/W. This high value, close to published record, demonstrates the good coupling efficiency between the Si waveguide and the lateral Ge photodetector and the efficiency of complete light absorption after a 10µm propagation length thanks to the butt coupling configuration used here.
Fig. 3 Responsivity versus reverse bias voltage for the 10µm long lateral pin Ge photodetector integrated at the end of a Si waveguide.
The cut-off frequency at 1.55µm of the integrated photodetectors was determined using three different opto-RF experiments (Fig. 4 ). The first measurement was based on the use of a 50GHz modulator calibrated with a 65GHz detector, which gave a cut-off frequency at −3dB much higher than 50GHz. Given those results, a 67GHz Lightwave component analyzer from Agilent (N4373C) was used. A bandwidth higher than 67GHz is still obtained leading difficult to estimate the bandwidth. The third experiment to determine the bandwidth was then based on the beating of two near optical lasers coupled with a 110GHz electrical spectrum analyzer. These measurements shown that the bandwidth is much higher than 50Ghz and it can be roughly estimated of about 120GHz. According to the transit time calculation, the maximum bandwidth should be about 53Ghz using the design i-Ge width of 500nm. However, after thermal annealing for dopant activation, dopant drift occurred and reduced the i-Ge width which explains the very high measured bandwidth.
Fig. 4 Normalized optical responses as a function of frequency under −2V bias at the wavelength of 1.55µm. The photodetector length was 10 µm.
The viability of the performances of this Ge waveguide PD was checked by measuring the data transmission at 40Gb/s. To perform these measurements the RF signal from a pseudo-random bit sequence (PRBS) generator was used to drive a LiNbO3 modulator. The light was then injected in the silicon waveguide and absorbed in the Ge photodetector, which was directly connected to a 60GHz Tektronics sampling oscilloscope.
Open eye diagrams from germanium detectors were obtained at 10Gb/s, 20Gb/s, 30Gb/s and 40Gb/s under 0V and −1V (Fig. 4). The fact that the eye diagram was still open under zero-bias at 40Gb/s corresponds to a major milestone for low power consumption receivers.
4. Conclusion
We report a Ge photodetector which was selectively grown at the end of silicon waveguide. A very high optical bandwidth estimated at 120 GHz is shown, with a responsivity as high as 0.8A/W at 1550 nm. Open eye diagrams at 40Gb/s were obtained under zero-bias. These ultra-fast performances of Ge integrated photodetectors constitute a new milestone towards new generations of several Tbs/s chips merging electronic and photonic building blocks and devices.
Acknowledgments
The research leading to these results has received funding from the European Community under grant agreement no. 224312 HELIOS and from the French ANR under project MICROS.
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