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On the silicon (Si) photonic platform, we monolithically integrated a silica-based arrayed-waveguide grating (AWG) and germanium (Ge) photodiodes (PDs) using low-temperature fabrication technology. We confirmed demultiplexing by the AWG, optical-electrical signal conversion by Ge PDs, and high-speed signal detection at all channels. In addition, we mounted a multichannel transimpedance amplifier/limiting amplifier (TIA/LA) circuit on the fabricated AWG-PD device using flip-chip bonding technology. The results show the promising potential of our Si photonic platform as a photonics-electronics convergence.
© 2012 Optical Society of America
1. Introduction
The silicon (Si) photonic platform realizes ultrasmall photonic devices, densely integrates multiple channels and functions, and is attracting much attention for integration of electronics on a single chip [1]. To leverage these features, wavelength-division multiplexing (WDM) systems are promising applications, because they demand a multi-channel configuration of optical devices and integration of them to reduce the footprint, cost, and power dissipation [2–4]. WDM-based systems are widely deployed aiming at large transmission capability, and have the potential to provide flexible and low-power operation of optical networks [5–7].
For telecommunications applications, however, the optical devices must meet several strict requirements, including high reliability, low insertion loss, low crosstalk, and insensitivity to polarization and temperature variations [8]. To satisfy these requirements, we must carefully select waveguide materials and structures on the Si photonic platform. For example, Si photonic wire waveguides provide an ultrasmall arrayed-waveguide grating (AWG), which can be monolihically integrated with waveguide-coupled germanium (Ge) photodiodes (PDs) [9]. An AWG based on Si wire waveguides are suitable for multi-channel configurations for WDM systems due to the small footprint, though these waveguides essentially have severe polarization dependence. To achieve polarization insensitivity, a large-core Si waveguides, which can be integrated with an echelle grating and Ge PDs, was developed [10], though it exhibits a residual thermo-optic effect. Another possible candidate is a silicon nitride (SiN) waveguide, which can be fabricated by a complimentary metal-oxide-semiconductor (CMOS) compatible process [11, 12]. It exhibits low transmission loss, but polarization sensitivity and some thermo-optic effect still remain. A promising solution is to use silica waveguides, which have low polarization dependence, a low thermo-optic coefficient, and low loss with reliable performance. Planar lightwave circuits (PLCs) based on silica waveguides are generally used in existing optical telecommunications networks [8, 13]. However, the conventional silica material for waveguides cannot be monolithically fabricated on the Si photonic platform because the high-temperature fabrication processes for commercial silica PLC production would damage the dynamic and electronic devices based on Si and Ge. Moreover, on the silica PLC platform, PD integration often requires extraordinary processes [14–17]. For integration of silica waveguides on the Si photonic platform, we recently developed a low-temperature fabrication technology that is compatible with Si dynamic photonic devices [18]. The technology is also helpful for silica and Ge integration.
Integration of electronics and photonics is the ultimate issue for higher functionalization. For long-reach telecommunications, Si WDM receivers have demonstrated integration of electronics using several single-channel circuits placed on an outer board connected with wire bonding [9,12]. However, there is still room for improvement in the photonics-electronics integration technology. In contrast, for short-reach optical interconnection, a full-monolithically integrated multi-channel receiver consisting of Si waveguides, Ge PDs, and transimpedance amplifier and limiting amplifier (TIA/LA) has already been realized [19]. However, an alternative approach was taken recently, because incompatibility of the fabrication processes, including wafer mismatch on silicon-on-insulator (SOI) and buried-oxide (BOX) thickness between the photonics and electronics, sacrifices the state-of-the-art CMOS technology and energy efficiency [20,21].
In this paper, towards application in optical telecommunications network, a one-chip integrated device of a silica-based AWG, Ge PDs, and an electronic integrated circuit is reported. We demonstrate monolithic integration of a silica-based AWG and Ge PDs on a Si photonic platform, and investigate the device’s performance. Then, we also integrate a multichannel TIA/LA circuit on the fabricated AWG-PD device to confirm whether or not the silica-Si-Ge photonic platform is promising towards photonics-electronics convergence.
2. Design and fabrication of monolithically integrated AWG-PD
Figure 1 is a schematic illustration of the connecting structure of a Si-rich silica (SiOx) waveguide for the AWG and Ge PD, and Fig. 2 shows schematic cross-sections of each component of the AWG-PD integrated device. The AWG is made of SiOx waveguides [18], which allows for lower transmission loss, a lower thermo-optic coefficient, and lower birefringence depending on core-geometry variation, compared to Si wire waveguides. Each SiOx waveguide has core with 3 μm ×3 μm cross-section and refractive index contrast (Δ) of about 2.6%. The AWG consists of 16-input and 16-output waveguides, two slab regions with a focal length of 1.75 mm, and 64 arrays with a minimum bending radius of 500 μm. It has the grating order of 52 and is designed for a channel spacing of 200 GHz (∼1.6 nm).
Fig. 2 Cross sections of AWG-PD integrated device. (a) SiOx waveguide, (b) SSC at Si taper tip, (c) Si wire rib waveguide, and (d) Ge PD.
Each output SiOx waveguide of the AWG is connected to a Si photonic wire waveguide through a spot-size converter (SSC) [18]. The SSC is a conventional one with an inverse Si taper. Si tip width, tip height, and taper length are 80 nm, 200 nm, and 300 μm, respectively. The Si tip is expanded to 600-nm width and changed into a rib-type waveguide which has 200-nm-thick and 600-nm-wide core and 100-nm-thick slab. Here, the core of the SiOx waveguide acts as overcladding of the Si wire waveguides [22]. These Si parts are optimized only for TE light, but they have already integrated with silica waveguide successfully [22]. Therefore, in this work, we employ them again to confirm the feasibility of silica-Si-Ge integration structure and its fabrication technology shown in Fig. 1. The Si wire rib-type waveguides are then coupled into Ge PDs. A Ge mesa is formed on the 200-nm-thick Si slab, and a vertical PIN diode is constructed between the Si slab and the upper electrode [23]. The thickness and area of the Ge mesa are about 1 μm and 8 μm × 50 μm, respectively.
Toward the fabrication of the AWG-PD, we started with a SOI substrate with a 200-nm-thick Si top layer and 3-μm-thick BOX. First, we defined Si photonic wire waveguides, Si inverse tapers for the SSCs, and Si slabs for Ge growth using electron-beam lithography and electron-cyclotron-resonance (ECR) plasma etching. Next, we removed the top Si layer at the region of the SiOx AWG using reactive ion etching (RIE). Then, we deposited SiO2 mask for Ge selective growth, and fabricated Ge PDs using the ultra-high-vacuum chemical vapor deposition (UHVCVD) method and previously reported processes [18, 23]. Following removal of unnecessary SiO2 mask, the next step was fabrication of the SiOx AWG. As the waveguide’s core material, we deposited SiOx film using ECR plasma-enhanced (PE) CVD with a mixture gas of SiH4 and O2. This method enabled us to fabricate high-quality silica film with an appropriate refractive index at a temperature of less than 200 degrees Celsius [18]. After that, the SiOx core of the AWG and SSCs were defined by photolithography and RIE. Then, we deposited SiO2 film by ECR PECVD at low temperature as over-cladding. By virtue of these low-temperature fabrication processes using the ECR plasma method, the Si wire waveguides and Ge PDs, which had already been fabricated in the previous processes, were not degraded by thermal damage. Then, we selectively removed the SiOx and SiO2 over the metal electrodes using RIE to form the electrical contacts. Figure 3 shows microscope images of fabricated AWG-PD devices. The AWG (array and slab waveguides) and 16-channel PD array occupy areas of 4.0 mm × 2.7 mm and 0.7 mm × 4.0 mm, respectively, within the total footprint of 7.8 mm square. We expect the total footprint can be reduced to about 4.5 mm × 5 mm by modifying the layout.
3. Characteristics of fabricated AWG-PD
First, we examined the performance of a Ge PD integrated with just an SiOx waveguide rather than an AWG. Figure 4 shows I-V curves under dark and illuminated conditions at room temperature. At a reverse bias of 3.3 V, the dark current was 636 nA. To input light into the Ge PD, a photonic chip was diced from a fabricated wafer, and then we butt-coupled a polarization-maintaining fiber (PMF) connected to a tunable laser diode (TLD) as a light source. The input polarization and wavelength were set to the TE mode and 1560.15 nm, respectively. Under continuous-wave illumination, a photocurrent of 217 μA at −3.3 V was generated, corresponding to a responsivity of 0.35 A/W. We found that the PD operates properly at the TIA/LA drive voltage. In estimating responsivity, we took into account PD-input power which defined as subtraction of fiber coupling loss and SiOx propagation loss from PMF output power. Therefore, the estimated responsivity was a gross value that included loss at the SSC. The SSC loss might be considerable because of monolithic fabrication processes of Ge PD, and net responsivity of just Si-waveguide-connected Ge PD would be higher. In fact, the measured responsivity was lower than our previous work without SSC in spite of same PD structure [23]. The SSC loss might originates in absorption or scattering loss due to the Ge and metal residues during Ge PD fabrication process. We can reduce that by fabrication improvement such as careful removal of the residues. The propagation loss of the SiOx waveguide was 1.6 dB/cm. It might be also deteriorated due to the residue at interface between undercladding and SiOx core, and it can be ameliorated by fabrication improvement. The coupling loss was 3.5 dB/facet, and that will be improved to about 0.5 dB/facet by adopting high-numerical-aperture fiber. Figure 5 shows a photocurrent spectrum of an integrated Ge PD. The input light was polarized to the TE mode and input power was −2.0 dBm. It exhibited no noticeable decrease in photocurrent in the C-band mainly because tensile strain stretched the band edge [24], and is suitable for a WDM receiver.
Fig. 4 I–V characteristics of an integrated Ge PD (blue: unilluminated, red:illuminated), the light was input from SiOx waveguide.
Next, to investigate the AWG-PD integrated device, we input the TE-mode light into the AWG-PD chip, scanned the TLD wavelength, and plotted the photocurrent produced by the PDs at a reverse bias of 2.0 volts as a function of wavelength for each of the 16 channels (Fig. 6). The figure is a superposition of 16 times separate wavelength scans. All 16 integrated Ge PDs were characterized and each spectrum was well resolved with interchannel crosstalk of less than −15 dB. The total insertion loss of the AWG was 9.2 dB at the center channel. The loss was brokendown as follows: 3.0 dB as SiOx propagation loss and 6.2 dB as internal loss in the AWG. In this AWG, the connecting design between slab region and waveguides was not sophisticated and diffractive loss at that point is attributed to an increase of the internal loss. We expect the internal loss could be reduced using accumulated silica AWG technology [13, 25]. Figure 7 shows the set of eye diagrams of all demultiplexed channels measured at 1.25 Gbps with nonreturn-to-zero (NRZ) pseudorandom bit stream (PRBS) data with word length of 231–1. The PDs were under reverse bias of 3.3 V. The settled wavelengths for all channel measurements are shown under each waveform. Clear eye openings and error-free operation were confirmed in all channels. Figure 8 shows bit error rate (BER) characteristics measured at Channel 7. We found that the fabricated device successfully received the signal without any visible error floor. The device needed relatively high received power because of the optical loss at the AWG and the SSC. It can be reduced, we expect by making the process improvements mentioned above. In addition, the bandwidth of the PD was restricted due to capacitance-resistance (CR) limitation, especially the resistivity of the P-type region. We have already developed a Ge PD that operates at over 10 Gbps [26]. We will introduce this design in the next step.
Fig. 6 Spectrum of fiber-to-detector photocurrent as a function of input wavelength for all 16 channels.
Fig. 7 Set of eye diagrams of 16 demultiplexed channels obtained from fabricated AWG-PD measured at a bitrate of 1.25 Gbps with NRZ PRBS data having a word length of 231 − 1.
4. Integration of TIA/LA with AWG-PD
Finally, to obtain a one-chip WDM receiver, we mounted a multichannel TIA/LA electronic circuit on the fabricated AWG-PD device using flip-chip bonding technology. In comparison with wire bonding, the flip-chip bonding technology provides low parasitic inductance and short interconnect length, which is suitable for high-frequency signal transmission. The technology has been widely developed and realized signal transmission of several tens of gigaheltz due to low parasitic inductance and short interconnect. Another advatage is enabling high I/O density and small footprint of module which is sutable for multichannel application such as WDM system. Figure 9 is a schematic cross-section of the one-chip integration of the TIA/LA on the Si photonic chip. We use upper layer over the SiO2 overcladding of the Si photonic chip as the electrical wiring layer of CMOS ICs. Electrodes of Ge PDs are vertically connected to the electric pads on the SiO2 overcladding where TIA/LA electrodes are to be direlctly bonded. The distance from the PD electrodes to TIA/LA bonding pads is designed to be small enough so that the transmission loss of high-frequency signal is negligible. The commercially available 12-channel TIA/LA, which accommodates a multichannel configuration densely, is mounted upside down. To obtain high-frequency differential signal through TIA/LA, we configure coplanar waveguides (CPW) at the output.
Fig. 9 Schematic cross-section of one-chip integration of TIA/LA on the AWG-PD integrated Si photonic chip.
Here, we explain the TIA/LA integration processes. Note that the Si photonic platform must be tolerant to following backend processes owing to its stable feature compared to compound semiconductor platforms [4, 27, 28]. First, we formed metal electrodes and electric wiring by copper (Cu) plating on the SiO2 over-cladding layer. Next, we covered the wafer with polyimide, opened contact windows, and formed a bonding pad with solder plating. Then, a TIA/LA was bonded with Sn-Ag-Cu solder bumps onto the photonic wafer using flip-chip bonding technology, followed by post-processing. Note that these processes were carried out at less than 300 degree Celsius so that the photonic wafer did not suffer thermal damage.
Figure 10 shows images of fabricated AWG-PD-TIA/LA integratad devices. Chip capacitors were mounted to cut low-frequency noise and shut surge current. DC lines were also placed in the same layer with CPW for a power supply to the TIA/LA. The footprint is about 10 mm square. To our knowledge, this is the smallest WDM receiver with TIA/LA accommodating 16 channels. It can be packaged in standard tranceiver housing, such as a small-factor pluggable (SFP) package. Figure 11(a) shows waveforms of TIA/LA output bias on the time axis. Yellow, green, and red lines are positive (P), negative (N), and differential output, respectively. Figure 11(b) is an eye diagram for Channel 8. It was obtained from the differential output of the TIA/LA at a detector bias of 3.3 V. In these experiments, the input signal was a 1.25-Gbps NRZ PRBS with a word length of 231–1. We obtained clear eye openings and confirmed that the TIA/LA was successfully integrated on the Si photonic device.
Fig. 10 Images of TIA/LA integratad AWG-PD devices. (a) Birds-eye view of a wafer after flip-chip bonding; (b) microscope image of AWG-PD-TIA/LA integrated device.
Fig. 11 (a) Waveform of TIA/LA output bias on the time axis. Yellow, green, and red lines are positive (P), negative (N), and differential output, respectively. (b) Eye diagram obtained from differential signal at input of 1.25-Gbps NRZ input.
5. Conclusion
We monolithically integrated an SiOx AWG and Ge PDs on a single Si chip. We confirmed the AWG and PDs were successfully operated at all channels. Moreover, we integrated multi-channel TIA/LA electric circuits on the Si photonic platform using flip-chip bonding technology. We confirmed wavelength-demultiplexing signal reception at bitrate of 1.25 Gbps through the integrated TIA/LA. These results demonstrate remarkable growth of monolithic integration technology of SiOx, Si, and Ge photonic devices, and exhibit hopeful potentials of Si photonic platform for photonics-electronics conversion.
Acknowledgments
The authors thank Mr. Toshifumi Watanabe, Dr. Sungbong Park, Mr. Hiroshi Fukuda, Mr. Yusuke Muranaka, Mr. Shin-ichiro Mutoh, and Dr. Sei-ichi Itabashi for their helpful technical supports and discussions.
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