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For enhancing the light extraction of a light-emitting diode, surface grating fabrication based on a simple method of combining photoelectrochemical (PEC) etching with phase mask interferometry has been demonstrated. To understand the optimum grating period in forming a surface grating on a vertical light-emitting diode (VLED), we construct a Llyod’s interferometer within PEC electrolyte (KOH) to fabricate surface gratings of various periods on VLEDs for comparing their light extraction efficiencies. Also, to compare the effectiveness of light extraction enhancement between surface grating and rough surface, VLEDs with the rough surfaces fabricated with two different KOH wet etching methods are fabricated. The comparisons of VLED characterizations show that among those grating VLEDs, the light extraction is more effective in a VLED of a smaller grating period. Also, compared with VLEDs of rough surfaces, the grating VLEDs of short grating periods (<2 μm) have the higher light extraction efficiencies, even though the root-mean-square roughness of the rough surface is significantly larger than the grating groove depth.
©2013 Optical Society of America
1. Introduction
Light extraction is an important issue in developing high-efficiency light-emitting diode for solid state lighting application. Various approaches have been used for enhancing the LED light extraction efficiency. The basic idea of increasing light extraction is to enhance light scattering either inside or on the surface of an LED. Strong light scattering can be produced by forming air voids inside an LED through patterned substrate growth [1], epitaxial lateral overgrowth [2], or post-growth interior etching [3, 4]. On the other hand, methods for roughening the LED surface have been widely utilized to increase the light extraction efficiency [5–10]. Also, periodical structures such as photonic crystals have been fabricated on the surface of or inside an LED for the same purpose [11–17]. To fabricate such a periodical structure, usually electron-beam, nano-imprint lithography, or holography, combining with a dry-etching technique, need to be used. Although such techniques can lead to very effective light extraction, they are expensive and usually cannot be used for mass production. Recently, this group has demonstrated an alternative method for effectively improving LED light extraction by fabricating a surface grating through the combination of phase mask interferometry and photoelectrochemical (PEC) etching [18]. Here, the stable interference fringe produced by the transmission of UV light through a phase mask is used for forming the PEC etching pattern. Because the PEC etching speed is almost linearly dependent on the local UV light intensity [19], the UV interference fringe leads to the PEC etching of a periodical groove structure on the surface of a nitride compound. Our previous results of lateral LEDs with the gratings formed on the second mesa regions of n-GaN have shown significantly enhanced light extraction efficiencies. The process of this method is simple, inexpensive, and can be simultaneously applied to multiple full-wafer samples (with a large phase mask size and a large UV illumination area through a proper arrangement of a UV LED array) for mass production. However, in using this method, for preparing the optimized phase mask, we need to first know the dependence of light extraction on grating period.
In this paper, we report the comparison results of the performances between vertical LEDs (VLEDs) with surface gratings of different grating periods and with rough surfaces of different wet etching conditions. To understand the dependence of the light extraction efficiency on the grating period of a surface grating, we construct a Llyod’s interferometer within PEC electrolyte (KOH) to fabricate surface gratings of various periods on VLEDs. Also, to compare the effectiveness of light extraction enhancement between surface grating and rough surface, VLEDs with the rough surfaces fabricated with two different KOH wet etching methods are fabricated. It is found that among those grating VLEDs, the light extraction is more effective in a VLED of a smaller grating period. Compared with VLEDs of rough surfaces, the grating VLEDs of short grating periods (<2 μm) can have the higher light extraction efficiencies, even though the root-mean-square (rms) roughness of the rough surface is significantly larger than the grating groove depth. In section 2 of this paper, the sample structures and their fabrication methods are demonstrated. The LED characterization results and their comparisons are shown in section 3. Discussions of these results are given in section 4. Finally, conclusions are drawn in section 5.
2. Sample structures and fabrication methods
In this study, as listed in Table 1, 12 VLED samples are prepared for comparison. Besides a reference sample (Ref) of flat N-face n-GaN surface, five grating VLEDs (samples A-E with decreasing grating period) and six VLEDs with rough surfaces (samples F-K) are fabricated on an InGaN/GaN quantum-well (QW) LED structure, which includes a u-GaN layer (2 μm), an n-GaN layer (2 μm), five periods of InGaN/GaN QW, a p-AlGaN current blocking layer (20 nm), and a p-GaN layer (120 nm). The emission wavelength of the QWs is around 480 nm. The sapphire substrate of the LED structure is removed through the laser liftoff technique after wafer-bonding the LED structure onto a Si substrate. A 200-nm Ag layer is added to the bonding metal structure for enhancing light reflection from the p-type side of the VLED. A polishing process is applied to remove the residual u-GaN layer and flatten the N-face n-GaN layer.
Table 1. VLED sample designations and their characterization results.
The surface gratings are formed with the setup shown in Fig. 1(a), in which a Llyod’s interferometer is immersed in the electrolyte (KOH) of a PEC process arrangement. After passing through a polarizer (P) to transmit vertically polarized light and a spatial filter (SF) to shape the laser beam, the HeCd laser beam of 10 mW in power is expanded to 3 cm in diameter by a convex-concave lens (lens 1) of 7.5 cm in focal length. After beam expansion, it is incident into the KOH solution (0.125 M) through a window of a plane-convex lens (lens 2) of a long focal length (20 cm) on one of the sidewalls of the container to illuminate the Llyod’s interferometer, which is schematically shown in Fig. 1(b). Here, the laser beam illuminates the corner of the two panels, on which a reflecting mirror and a VLED sample are individually installed. The laser beam diameter at the corner is about 2.6 cm. The one-half laser beam reflected from the mirror interferes with the other one-half directly illuminating onto the VLED sample to form a fringe for producing a surface grating on the VLED structure through PEC etching. The grating period is controlled by adjusting the angle between the two panels. The reason for laser illumination through the container sidewall is to avoid the effect of ripples on the surface of KOH solution. Such an effect can blur the interference fringe formed in the Llyod’s interferometer. Figures 2(a) and 2(b) show the scanning electron microscopy (SEM) and atomic force microscopy (AFM) images, respectively, of sample A. Figures 2(c) and 2(d) (Figs. 2(e) and 2(f)) show the similar images of sample C (E). The AFM images in Figs. 2(b) and 2(d) have the dimension of 20 μm x 20 μm. That in Fig. 2(f) has the dimension of 10 μm x 10 μm. The grating period ranges from 2.36 μm for sample A through 0.50 μm for sample E. In preparing all the grating VLEDs (samples A-E), the PEC etching times are the same at 10 min such that the depths of their grating grooves are about the same. The grating groove depths of samples A-E are shown in row 4 of Table 1. Their values are quite close (from 231 nm for sample C through 239 nm for sample E). Since the grating groove depths of those grating VLED samples are about the same, it is believed that the major factor for controlling the light extraction efficiency is the grating period. From the AFM images, one can see the gratings are essentially formed with sub-μm grain features of irregular geometry. The geometry of grain features is related to the designated grating period. Such grain features will also influence light scattering on a grating surface.
Fig. 1 (a) Optical setup for forming surface gratings. P: polarizer; SF: spatial filter. (b) Lloyd’s interferometer in the PEC electrolyte (KOH).
Fig. 2 (a) and (b): SEM and AFM images of sample A, respectively. (c) and (d): SEM and AFM images of sample C, respectively. (e) and (f): SEM and AFM images of sample E, respectively. The AFM images in (b) and (d) have the dimension of 20 μm x 20 μm. That in (f) has the dimension of 10 μm x 10 μm.
For fabricating the VLEDs with rough surfaces, we consider two wet etching methods. In samples F-H, we use the same PEC etching process as that for grating fabrication but without forming the interference fringe. In other words, the VLED samples are placed in the KOH solution at a position in front of the Llyod’s interferometer for laser illumination. With PEC etching with 0.125 M KOH again for 10, 20, and 30 min under the same laser illumination condition to fabricate the rough surfaces on samples F-H, respectively, the root-mean-square (rms) roughness levels (typical peak-to-valley heights) from the AFM measurements are about 83, 98, and 113 nm (217, 283, and 313 nm), respectively. Those rms roughness levels for samples F-H are listed in row 4 of Table 1. Figures 3(a) and 3(b) (Figs. 3(c) and 3(d)) show the SEM and AFM images of sample F (H), respectively. The AFM images have the dimension of 10 μm x 10 μm. Here, we can see a distribution of smooth grain domains on the surface in either sample F or H. With a longer PEC process time, the size of the grain domain becomes larger. For preparing samples I-K, instead of the PEC process, we use a room-temperature wet etching process with 2 M KOH (without UV light illumination) for 1, 2, and 3 hours, respectively. The rms roughness levels (typical peak-to-valley height) of samples I-K are 147, 208, and 295 nm (368, 535, and 704 nm), respectively. Those rms roughness levels for samples I-K are also listed in row 4 of Table 1. The surface roughness with wet etching of 2M KOH is significantly higher than that with the PEC process. Figures 3(e) and 3(f) (Figs. 3(g) and 3(h)) show the SEM and AFM images of sample I (K), respectively. Here, we can see a distribution of pyramidal islands on the surface of either sample I or K. A longer etching time leads to larger and higher pyramidal islands. The pyramidal islands of samples I-K are generally larger and sharper than the grain domains of samples F-H, leading to the significantly larger rms roughness levels.
Fig. 3 (a) and (b): SEM and AFM images of sample F, respectively. (c) and (d): SEM and AFM images of sample H, respectively. (e) and (f): SEM and AFM images of sample I, respectively. (g) and (h): SEM and AFM images of sample K, respectively. The AFM images have the dimension of 10 μm x 10 μm.
After the formation of either a surface grating or rough surface structure on the N-face n-GaN layer, various samples of VLED are processed with the device structure shown in Fig. 4 (with a surface grating for demonstration purpose). Here, a square depression of 100 μm x 100 μm is prepared by etching all the semiconductor layers to expose the metal layer for depositing the Ti/Au (20/100 nm) p-contact. The thin Ti/Au (5/5 nm) current spreading layer is deposited on the grating or rough surface over the whole semiconductor mesa area. The U-shaped Ti/Au (20/100 nm) n-contact with a circular contact pad of 90 μm in diameter is then formed on the top. The p- and n-contacts and current spreading layer are thermally annealed at 400 °C for 5 min. Because the wafer-bonding metal can be damaged if the annealing temperature is higher than 400 °C, the use of a higher annealing temperature for better metal/semiconductor junctions is not recommended. The wafer-bonding metal consists of a Ni layer (5 nm in thickness), an Ag layer (200 nm in thickness), an Au layer (2 μm in thickness), and a Ti layer (50 nm in thickness) from the p-GaN side to the Si-substrate side. The mesa dimension of those VLEDs is 300 μm x 400 μm.
3. LED characterization results
Figure 5 shows the VLED output intensities as functions of injection current (L-I curves) of all the 12 VLED samples. The measurement is undertaken by using a focusing lens to collect VLED output power from the top covering a polar angle of about 30 degrees. Here, one can see that all the samples with surface structures have the higher output intensities than the reference sample of a flat surface. Generally speaking, the grating VLEDs with smaller grating periods (samples B-E) have higher output intensities than all the rough-surface VLEDs (samples F-K). Also, the rough surfaces formed by high-concentration KOH (2 M) etching (samples I-K) lead to stronger output intensities, when compared with the rough surfaces formed by PEC etching (0.125 M KOH) (samples F-H). Among those grating VLEDs (samples A-E), a smaller grating period results in higher output intensity. Row 5 of Table 1 shows the relative output intensities of those VLEDs at 100 mA in injection current when that of sample E is normalized to unity. Then, row 6 of Table 1 shows the enhancement ratio of output intensity with respect to the reference sample at the same injection current. Here, one can see that the output intensity of sample E (0.5 μm in grating period) is higher than that of the reference sample by 117%. It is expected that the enhancement ratio can be even higher if the grating period can be further decreased. In sample K, although the surface is very rough, the output intensity is enhanced only by 50%, when compared with the reference sample. Its roughness level and the resultant output intensity enhancement ratio are actually similar to what reported [5, 9]. Under our experimental conditions, a surface grating of a small period can result in higher light extraction efficiency, when compared with a rough surface. The insert of Fig. 5 shows the picture of a lit VLED of the reference sample at 30 mA in injection current.
Fig. 5 L-I curves of all the 12 VLED samples. The insert shows the picture of a lit VLED of the reference sample at 30 mA in injection current.
Figure 6 shows the angle-dependent output intensities of those samples when the injection current is 60 mA. Here, zero degree corresponds to the normal to the LED top surface, i.e., the z axis in Fig. 4. The angled-dependent measurement is carried out on the x-z plane (see the coordinate system in Fig. 4). In Fig. 6, the relative intensities among those samples are similar to those of the L-I curves in Fig. 5. It is noted that no clear diffraction pattern can be seen in the curve of any grating VLED sample. This is so because the light incident upon the grating surface can be from all possible directions. The small peaks in the angle range >78 degrees can be caused by the scattering of the propagating mode along the QWs inside the LED that is affected by the surface structures. The enhancement ratios of LED output intensity of all the samples with respect to the reference sample evaluated by integrating the angle-dependent intensities shown in Fig. 6 are listed in row 7 of Table 1. Here, one can see that the variation trend among those samples is the same as that shown in row 5, which is obtained from the collection of output light in the 30-degree polar angle coverage. Except sample D, the enhancement ratio of the angle-integrated output intensity is larger than that from the measurement of 30-degree light collection.
Figure 7 shows the relations of the injection current with applied voltage (I-V curves) of all the 12 samples. Those curves are quite close to each other. The insert shows the magnified portion circled by the dashed rectangle. Here, no significant current leakage in any VLED sample can be observed. The turn-on voltages of all the samples are around 3 V. The device resistance values of those samples are listed in the bottom row of Table 1. One can see that all the VLEDs with surface structures have higher device resistance than the flat-surface VLED (the reference sample). Among the three groups of surface-structured sample, the grating VLEDs have the highest device resistance. A larger grating period leads to a higher device resistance level. The device resistance levels of the VLED samples with the rough surfaces fabricated with PEC etching are slightly smaller, when compared with the grating VLEDs. Here, a rougher surface results in a lower device resistance value. Those of the VLED samples with the rough surfaces fabricated with higher-concentration KOH etching are quite low, close to the level of the reference sample. Again, a rougher surface leads to a lower device resistance value. The higher resistance of a surface-structured VLED, when compared with the flat-surface VLED, can be attributed to the weaker contact of the current spreading layer onto the n-GaN layer. Although the exposed area of the structured surface is larger than that of the flat surface, the area of close contact with the current spreading layer can be smaller, leading to a higher resistance level. Among those surface-structured VLEDs, a rougher surface has a larger exposed area and hence a larger area of close contact with the current spreading layer, resulting in a lower resistance level. Among those grating VLEDs, a smaller grating period leads to a larger exposed area and hence a lower resistance value. The contact condition of the current spreading layer onto a structured surface can be improved if a higher-temperature (say, 600 °C, instead of the used 400 °C) thermal annealing process can be applied. However, as mentioned earlier, a thermal annealing process with temperature higher than 400 °C will damage the wafer bonding structure. This is a crucial issue for further investigation in improving the performance of a VLED.
Fig. 7 I-V curves of the 12 VLED samples. The insert shows the magnified portion circled by the dashed rectangle.
4. Discussions
The results above show that a surface grating structure can lead to stronger output intensity even though it results in higher device resistance, when compared with a rough surface structure of larger roughness. In other words, a surface grating is more effective for VLED light extraction. This observation can be attributed to the mixed effect of grating diffraction and rough surface scattering in a surface grating structure. As mentioned earlier and shown in Figs. 2(a)-2(f), the grating patterns consist of the grain domains of various sizes. The scattering of a smaller-scale rough surface structure combines with the diffraction of a larger-scale grating pattern can lead to higher light extraction efficiency [9]. A grating with a smaller period can lead to stronger diffraction and scattering, when compared with another of the similar grating groove depth but with a larger grating period. It is expected that with a grating period smaller than 0. 5 μm, the light extraction can be even more effective. However, a minimum grating period for this increasing trend of light extraction efficiency may exist. Note that although the rms roughness level increases significantly from sample F to sample K (from 83 through 295 nm), the VLED output intensity is not much enhanced (from 4 through 50% or from 6 through 64%) for being comparable with those of the grating VLEDs of small grating periods (<2 μm). This result can be due to the concomitant increasing trend of the grain domain size with the vertical fluctuation range. This trend leads to the increasing correlation length of surface roughness and hence the decreasing scattering strength of the rough surface [20]. In other words, although the rms roughness level of sample K is large, its light extraction efficiency is not as high as those of samples B-E because of the large in-plane scale size of the grain domain in such a sample.
Theoretically, if the groove depth can be maintained at a fixed level, a decrease of grating period should lead to stronger light extraction in such a VLED. However, practically in fabricating a grating of a small period, the feasible groove depth usually decreases with decreasing grating period. In this situation, light extraction efficiency cannot continue to increase with decreasing grating period. Also, the small grating period may degrade the contact of the current spreading metal to n-GaN such that the device resistance eventually increases with decreasing grating period. Meanwhile, for the mass production of such a grating VLED, the fabrication of a phase mask for producing the interference fringe represents a cost issue. A phase mask with a smaller period usually has a higher cost. With the cost issue taken into account, the grating with a period in the range of 0.4-0.5 μm can be an optimum choice. Regarding the issue of grating groove depth, a larger groove depth is expected to result in higher light extraction efficiency. Nevertheless, the important factors of device resistance and current spreading may hinder the fabrication of deep grooves on the device surface. The variation of groove depth is an issue strongly related to the electrical property of such a VLED. Finally, it is worth mentioning that compared with a dry etching process, PEC etching has the advantage of producing significantly less surface damage.
5. Conclusions
In summary, we have constructed a Llyod’s interferometer within PEC electrolyte to fabricate surface gratings of various periods on VLEDs for comparing their light extraction efficiencies. Also, VLEDs with the rough surfaces fabricated with two different KOH wet etching methods were prepared for comparing the effectiveness of light extraction enhancement between surface grating and rough surface. It was found that among those grating VLEDs, the light extraction was more effective in a VLED of a smaller grating period. Also, compared with VLEDs of rough surfaces, the grating VLEDs of short grating periods (<2 μm) had the higher light extraction efficiencies, even though the rms roughness of the rough surface was significantly larger than the grating groove depth. These research results can help in optimizing the fabrication specifications of a phase mask, which will be used for producing an interference fringe to combine with PEC etching for fabricating a surface grating on a VLED. The combination of phase mask interferometry with PEC etching can lead to an inexpensive method for effectively enhancing the light extraction of a VLED. This method is particularly suitable for mass production.
Acknowledgments
This research was supported by National Science Council, Taiwan, The Republic of China, under the grants of NSC 101-2221-E-002-153, NSC 99-2221-E-002-123-MY3, NSC 101-2622-E-002-002-CC2, NSC 101-2120-M-002-013, by the Excellent Research Projects of National Taiwan University (101R890952 and 101R890951), and by US Air Force Scientific Research Office under the contract of AOARD-12-4068.
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