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High-speed, low-loss silicon Mach–Zehnder modulators with doping optimization

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Abstract

We demonstrate a high-speed silicon Mach-Zehnder modulator (MZM) with low insertion loss, based on the carrier depletion effect in a lateral PN junction. A 1.9 dB on-chip insertion loss and a VπLπ < 2 V·cm were achieved in an MZM with a 750 μm-long phase shifter by properly choosing the doping concentration and precisely locating the junction. High-speed modulations up to 45–60 Gbit/s have been demonstrated with an additional 1.6 dB optical loss, indicating a total insertion loss of 3.5 dB. A high extinction ratio of 7.5 dB was also realized at the bit rate of 50 Gbit/s with an acceptable insertion loss of 6.5 dB.

©2013 Optical Society of America

1. Introduction

After a decade of research on silicon photonic devices, most of the key components have been developed to the point that they have reliable performance. Integrating all these devices together on a silicon-on-insulator (SOI) wafer makes it possible to realize an optical network on a chip for achieving terabit-per-second on-chip and off-chip interconnects. The transmission capacity of the on-chip photonics link is determined by the optical modulation and detection speed. As the geranium-on-silicon photodetectors have demonstrated bandwidths of more than 100 GHz [1], the modulation speed has actually become the bandwidth bottleneck of the silicon-based optoelectronics integrated circuit (OEIC). Therefore, any improvement in the operation speed of silicon modulators would be essential for increasing the interconnection capacity of future OEIC chips. On the other hand, the insertion loss of silicon modulators needs to be reduced to meet the loss budget constrained by other devices and to extend the interconnection distance.

Recently, high-speed silicon modulators have made great progress. Silicon modulators based on microrings, microdisks, and photonic crystals exhibit the advantages of ultra-small size [2,3], ultra-low modulation power [2,4], and a high modulation speed of up to 44 Gbit/s [5]. However, microresonator-based modulators suffer from a significant thermal sensitivity that makes their application in OEICs considerably challenging. Silicon modulators based on Mach-Zehnder interferometers (MZI) are commonly used owing to their broad optical bandwidth and large temperature tolerance. Modulation speeds up to 50 Gbit/s have been recently demonstrated based on MZI modulators (MZMs) with reverse-biased PN junctions [6,7]. Owing to the relatively weak light-carrier overlap of the depletion-mode modulator, either millimeter-long phase-shifters or high doping concentrations are employed to obtain acceptable extinction ratios (ERs), which eventually result in an increase of the optical insertion loss. The doping concentrations previously chosen, which span a wide range from 5 × 1016 cm−3 to 2 × 1018 cm−3 [811], need to be optimized for high speed and low insertion loss as well. Table 1 summarizes the modulation performance of the previously reported silicon MZMs with speeds over 40 Gbit/s [6,7,9,1216]. However, only some of the listed devices achieve optical losses of < 5 dB when operating at high speed.

Tables Icon

Table 1. Performance Comparison of Some Previously Reported Silicon MZMs with the Speed >40 Gbit/s

In this paper, we report high-speed and low-loss silicon carrier-depletion MZMs based on doping optimization of the lateral PN junctions. A method is developed to determine the doping concentration for a low on-chip insertion loss by taking into consideration of both the waveguide loss and the doping absorption loss. An on-chip insertion loss of ~2 dB and a VπLπ of ~2 V·cm are experimentally realized with an optimally designed doping concentration. High-speed modulations up to 60 Gbit/s are demonstrated using a compact MZM with a 750-μm-long phase shifter. A low optical loss of 3.5 dB and the highest ER of 7.5 dB are respectively achieved at 50 Gbit/s, as listed in the table.

2. Device design and fabrication

2.1 Fabrication process

The present device was fabricated on a 200-mm silicon-on-insulator (SOI) wafer with a 340-nm-thick top silicon film and a 2-μm-thick buried oxide layer, using the Semiconductor Manufacturing International Corporation (SMIC) 0.18-μm CMOS photonics process. A photograph of the MZM with coplanar waveguide (CPW) electrodes is shown in Fig. 1(a) . The passive waveguides and grating couplers were first defined and fabricated by deep-UV optical lithography and the inductively-coupled-plasma (ICP) etching process. Multiple-step P-type ion-implantations were then used to achieve a uniform background doping concentration of ~2 × 1017 cm−3. N-type implantations with a target concentration of 4 × 1017 cm−3 were then employed to compensate the background doping and form an abrupt PN junction. Highly doped P + + and N + + regions were both located 1 μm away from the waveguide sidewalls and then rapidly annealed for the doping activation. After depositing a 1-μm-thick SiO2 cap layer above the waveguide by plasma-enhanced chemical vapor deposition (PECVD), the tungsten vias and aluminum electrodes were then sputtered, patterned, and etched to form the electric contact.

 figure: Fig. 1

Fig. 1 (a) Photograph of the MZM with ground-signal-ground (GSG) electrodes. (b) Schematic structure of the phase shifter.

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2.2 Waveguide and doping design

The MZI arms are based on two identical phase shift waveguides embedded with the PN junctions, with the schematic cross-section structure shown in Fig. 1(b). Instead of the widely used 220-nm-high silicon waveguides, we employ a waveguide height of 340 nm to improve the mode confinement for a better light-carrier overlap. A width of 450 nm is utilized to meet the single mode condition. The slab thickness is designed to be 80 nm to avoid resistance-induced bandwidth limitation. The power splitter at each end of the MZI is based on the multimode interference coupler (MMI) with a large fabrication tolerance. Similar to the designing approach introduced in Ref. [17], the taper width and length of the input and output tapers are optimized with the 3-D FDTD method with a theoretical insertion loss of 0.1–0.2 dB.

The doping profile of the PN junction is a basic part of the modulator design but also the most essential. The doping design includes the determination of the junction pattern, the junction location, and the doping concentration. Lateral PN junctions and interleaved PN junctions are the most widely used doping patterns for depletion-type silicon modulators. It has been demonstrated that the interleaved PN junction provides a low VπLπ figure of merit of 0.62 V·cm as a result of a more complete overlap with the optical mode [11]. However, the extended junction length of the interleaved region would increase the capacitance per unit length and hence reduce the modulation bandwidth. In this work, in order to obtain a maximum modulation speed, we choose the lateral PN junction instead, as it has the least useless capacitance.

The doping concentration of the PN junction is critical for the on-chip insertion loss, but should consider the waveguide’s passive loss. The insertion loss of a MZM can be divided into three parts: the optical loss of each splitter αsp, the free-carrier-induced absorption loss αdp, and the optical propagation loss αwg. If the π-phase shifting length is Lπ, the total on-chip insertion loss ILπ can therefore be defined as

ILπ=2αsp+(αdp+αwg)Lπ
If we assume that the PN junction is symmetrically doped with a concentration of Ndop, αdp would change roughly linearly with Ndop. On the other hand, Lπ is approximately proportional to the 1/Ndop under a certain reverse-bias voltage [18]. Therefore, the relationship between ILπ and Ndop can be described as
ILπ2αsp+(ANdop+αwg)BNdop=2αsp+(ANdop+αwg/Ndop)B
where A and B are constants related to the optical confinement and the light-carrier overlap. If the doping concentration Ndop is too high, the absorption-induced loss would become the dominant loss. On the contrary, a much lower Ndop requires a long phase shifter because of the weakened modulation efficiency, which also causes a large waveguide-induced loss. Therefore, we can obtain a minimized insertion loss by choosing a proper doping concentration.

The ILπ is calculated to determine the best Ndop to obtain the lowest insertion loss by using an analytical model similar to that described in Ref. [19]. The splitter loss was not included as it is independent of the doping profile. Figure 2(a) presents the simulated insertion loss as a function of Ndop under a −5 V bias voltage. Based on the previous experiments in Ref. [20,21], the junction is offset by ~50 nm from the waveguide center in the following simulations for a maximum modulation efficiency. It can be seen that the device with the lower passive waveguide loss has the smaller insertion loss. For example, the estimated insertion loss with a Ndop of ~3 × 1017 cm−3 is reduced from 6.5 dB to 2.6 dB when the αwg decreases from 15 dB/cm to 2 dB/cm. However, the corresponding Ndop for the lowest insertion loss is a function of the passive loss αwg, as plotted in Fig. 2(b). The optimum Ndop changes from 5 × 1016 cm−3 to 3.3 × 1017 cm−3 as the αwg varies from 2 dB/cm to 15 dB/cm. The typical αwg of the waveguide employed in the present device is 8–10 dB/cm based on the current waveguide dimensions and fabrication process. Therefore, both the P- and N-type doping concentration are chosen to be ~2 × 1017 cm−3.

 figure: Fig. 2

Fig. 2 (a) Simulated on-chip insertion loss at different doping concentrations. (b) Optimum doping concentrations for the lowest insertion loss when the passive waveguide loss αwg varies from 2 to 15 dB/cm.

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2.3 Electrode design

The junction capacitance can be expressed as CJ ≈330/(0.9-Vbias)1/2 fJ/mm using the numerical modeling method, where Vbias is the bias voltage applied to the junction. The ground-signal-ground (GSG) electrodes are appropriately designed using the circuit model introduced in Ref. [20]. Figure 3(a) shows the characteristic impedance of the loaded electrodes with different GSG configurations. The characteristic impedance Z0 is ~50 Ω when the width of the signal line W and the gap width between the signal and ground line G are set to be 10 μm and 40 μm. However, as shown in Fig. 3(b), a lower microwave loss is realized when G = 5 μm. Although the characteristic impedance Z0 decreases to ~30 Ω under this condition, we choose this electrode design for a higher electro-optical bandwidth with a corresponding acceptable S11 of ~-10 dB.

 figure: Fig. 3

Fig. 3 Simulated (a) characteristic impedance and (b) attenuation per millimeter of the MZM with the GSG electrode with a 50-Ω termination at −5 V.

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3. DC performance

We measured the optical transmission spectra of the MZM with a 750-μm-long phase shifter by using a grating-coupler-enabled experimental set-up. As shown in Fig. 4(a) , the optical transmissions are measured with the reverse-biased voltage varying from 0 V to −8 V. As shown in Fig. 4(b), the corresponding modulation efficiency is calculated by measuring the wavelength shift at each bias voltage. The efficiency figure of merit VπLπ of 1.6–2.0 V·cm were enabled by the accurate location of the PN junction. Compared to other modulators with similar modulation efficiencies, the relatively lower doping concentration of our device helps to realize a low insertion loss. By normalizing the recorded optical spectra to a pair of reference grating couplers that are the same as those used in the modulators, a DC insertion loss of 1.9 dB is obtained as shown in Fig. 4(a). By measuring and curve-fitting the transmission of the MMI splitters with different numbers, the insertion loss of each MMI was calculated to be ~0.35 dB, see Fig. 4(c). Therefore, the phase shifter induces a loss of 1.2 dB resulting from the passive waveguide loss of ~9 dB/cm and the doping absorption loss of ~7 dB/cm which were determined by curve fitting the resonances of a doped and undoped microring, respectively, as previously described in Ref. [21].

 figure: Fig. 4

Fig. 4 DC performances of the MZM with a 750-μm-long phase shifter. (a) Optical spectral curves at different bias voltages. (b) Corresponding efficiency figure of merit VπLπ extracted from the spectral shift. (c) Measured insertion losses of the MMI splitters with the cascade configuration shown in the inset.

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4. Dynamic performance

4.1 Small signal characterization

The electrical S-parameters of the modulators were measured from DC to 40 GHz by a vector network analyzer (VNA) (Anritsu MS4644A). The microwave probe, bias tee, and coaxial cables were calibrated before the measurement using the short-open-load-through (SLOT) calibration method. Figures 5(a) and 5(b) represent the measured electrical S21 and S11 values of the modulators, respectively, when terminated with a 50-Ω resistor. The frequency responses of a modulator with a 500-μm phase shifter are also shown for comparison. Under the bias voltage of −5 V, the electrical 6-dB roll-off bandwidth is 27.7 GHz for the modulator with a 750-μm-long phase shifter, whereas for the modulator with the 500-μm-long phase shifter, the electrical bandwidth is beyond 40 GHz. The dramatic difference in the bandwidth comes from the microwave resonating around 34 GHz, which is the result of the impedance mismatch between the probe and the electrode. By using an on-chip impedance-matching load to reduce the microwave reflection, the estimated bandwidth can be improved to > 35 GHz with the same electrode design. However, such bandwidth is enough to achieve a high modulation speed beyond 40 Gbit/s. The S11 parameters for both device lengths were also measured as under −9 dB up to a bandwidth of 40 GHz, showing the capability of operating with a 50-Ω terminator.

 figure: Fig. 5

Fig. 5 Measured electrical S21 and S11 parameters of the modulator with (a) a 500-μm-long and (b) a 750-μm-long phase shifter.

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The electro-optical (E-O) modulation response was measured by the same system. A 50-GHz photodetector from U2T was used and calibrated before the test. Figure 6 shows the normalized E-O responses of the 750-μm-long device under the bias voltage of 0 V and −5 V, respectively. The maximum 3-dB E-O bandwidth of 27.8 GHz is approximately the same as the electrical 6-dB bandwidth, which implies a good velocity-matching between electrical and optical waves.

 figure: Fig. 6

Fig. 6 Measured E-O response of the MZM with the 750-μm-long phase shifter under the bias voltage of 0 V (blue line) and −5 V (red line), respectively.

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4.2 Eye-diagram demonstration

We carried out eye-diagram measurements to demonstrate the high-speed ability of the 750-μm-long MZM. A 56-Gbit/s bit-error-rate tester (BERT) from SHF was used to generate the pseudo-random binary sequence (PRBS) driving signals with a 231-1 pattern length. The Vpp of the driving signals was amplified to ~6.5 V by a 40-GHz modulator driver and then applied to the CPW electrodes through a 50-GHz RF probe. A 50-Ω load was used to terminate the output electrodes via a DC block. The light output from the modulator was amplified by an erbium-doped fiber amplifier (EDFA) and then passed through a 100-GHz optical filter to eliminate the spontaneous emission noise. The amplified optical signal was then fed into the 80-GHz optical sampling module of a digital oscilloscope (Tektronix DSA8200). The power of the amplified light was kept below 13 mW in the DC state to avoid damage to the optical head, which is also the reference optical power for the calculation of the additional modulation losses. During the dynamic operation, the wavelength was tuned for the tradeoff between the IL and the ER. Figures 7(a) and 7(b) present the measured modulation eye-diagrams at 50 Gbit/s. When the wavelength was located below the quadrature point (1558.79 nm), an ER of 7.5 dB was demonstrated. The additional modulation loss of 4.6 dB can be calculated from the optical power of 4.5 mW at the “1 1evel,” whereas for the wavelength at the quadrature point (1559.34 nm), the corresponding ER and additional loss decrease to 3.9 dB and 1.5 dB, respectively. Figures 7(c) and 7(d) show the eye-diagrams at 45 Gbit/s and 60 Gbit/s with the same condition as Fig. 7(b). It can be observed that the maximum power level in all cases is 9.1 ± 0.4 mW which indicates an average additional optical loss of ~1.6 dB.

 figure: Fig. 7

Fig. 7 Measured eye diagram of the MZM with a 750-μm-long phase shifter: (a) below and (b) at the quadrature wavelength, both with a bit rate of 50 Gbit/s. (c) and (d) show the eye-diagrams at 45 Gbit/s and 60 Gbit/s, respectively. In all cases, the driving voltage has a Vpp of ~6.5 V and a DC bias of −5 V.

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5. Conclusion

A silicon MZI modulator with a speed up to 60 Gbit/s and an on-chip insertion loss of 1.9 dB was demonstrated. An optimum doping concentration of 2 × 1017 cm−3 was chosen for the minimized insertion loss according to an analytical model. A VπLπ < 2 V·cm was realized by accurately locating the PN junction inside the waveguide. A ~28 GHz modulation bandwidth of the modulator with a 750-μm-long phase shifter was confirmed both by S21 measurement and E-O measurement. Open eye-diagrams were obtained at speeds from 45 to 60 Gbit/s with low total insertion losses of ~3.5 dB, including the modulation-induced additional loss. A high ER modulation of 7.5 dB and an insertion loss of 6.5 dB were also achieved at 50 Gbit/s by adjusting the wavelength, showing the potential for on-chip integration with other photonic devices. Further reduction of the driving power can be realized by using a phase shifter with a length of Lπ ~3 mm and Vπ ~6.5 V according to the current modulation efficiency. The insertion loss for such a long modulator is estimated to be <2 dB if reducing the waveguide loss to 2 dB/cm by removing the sidewall roughness based on the oxidation smoothing and anisotropic etching processes [22]. Actually, a phase shift of π/3 is enough for the OOK modulation with acceptable ER and low additional loss, corresponding to a small Vpp ~2 V. Moreover, the driving voltage can be further reduced by half by employing the differential [23,24] or push-pull driving scheme [6], which will be shown in future work.

Acknowledgments

The authors thank Semiconductor Manufacturing International Corporation for the fabrication support and process optimization of the current silicon photonics research. The present work was supported by the National Basic Research Program of China (Grant No. 2011CB301701, No. 2012CB933502, and No. 2012CB933504), the Knowledge Innovation Program of the Chinese Academy of Sciences (Grant No. KGCX2-EW-102), and the National Natural Science Foundation of China (Grant No. 61107048 and No. 61275065).

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Figures (7)

Fig. 1
Fig. 1 (a) Photograph of the MZM with ground-signal-ground (GSG) electrodes. (b) Schematic structure of the phase shifter.
Fig. 2
Fig. 2 (a) Simulated on-chip insertion loss at different doping concentrations. (b) Optimum doping concentrations for the lowest insertion loss when the passive waveguide loss αwg varies from 2 to 15 dB/cm.
Fig. 3
Fig. 3 Simulated (a) characteristic impedance and (b) attenuation per millimeter of the MZM with the GSG electrode with a 50-Ω termination at −5 V.
Fig. 4
Fig. 4 DC performances of the MZM with a 750-μm-long phase shifter. (a) Optical spectral curves at different bias voltages. (b) Corresponding efficiency figure of merit VπLπ extracted from the spectral shift. (c) Measured insertion losses of the MMI splitters with the cascade configuration shown in the inset.
Fig. 5
Fig. 5 Measured electrical S21 and S11 parameters of the modulator with (a) a 500-μm-long and (b) a 750-μm-long phase shifter.
Fig. 6
Fig. 6 Measured E-O response of the MZM with the 750-μm-long phase shifter under the bias voltage of 0 V (blue line) and −5 V (red line), respectively.
Fig. 7
Fig. 7 Measured eye diagram of the MZM with a 750-μm-long phase shifter: (a) below and (b) at the quadrature wavelength, both with a bit rate of 50 Gbit/s. (c) and (d) show the eye-diagrams at 45 Gbit/s and 60 Gbit/s, respectively. In all cases, the driving voltage has a Vpp of ~6.5 V and a DC bias of −5 V.

Tables (1)

Tables Icon

Table 1 Performance Comparison of Some Previously Reported Silicon MZMs with the Speed >40 Gbit/s

Equations (2)

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I L π =2 α sp +( α dp + α wg ) L π
I L π 2 α sp +(A N dop + α wg ) B N dop =2 α sp +(A N dop + α wg / N dop )B
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