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Visible light communications: real time 10 Mb/s link with a low bandwidth polymer light-emitting diode

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Abstract

This paper presents new experimental results on a polymer light-emitting diode based visible light communications system. For the first time we demonstrate a 10 Mb/s link based on the on-off keying data format with real time equalization on a field programmable gate array. The 10 Mb/s transmission speed is available at a bit error rate less than 4.6 × 10−3, which is the limit for forward error correction. At a BER of 10−6 a transmission speed of 7 Mb/s is readily achievable.

© 2014 Optical Society of America

1. Introduction

Organic and polymer light-emitting diodes (PLEDs) have been gaining substantial attention in recent years due to their outstanding potential for future lighting and display applications [1]. Advantages of PLEDS include low-cost solvent-based processing which in turn means large area devices are palpable with relative ease in comparison to inorganic LEDs.

As with white LEDs, white PLEDs are also seen as a viable source in visible light communications (VLC) offering simultaneous illumination and data communications within rooms/offices environment. In both organic and inorganic VLC there is a common desire to drive up the data rate and this is reflected in the literature; PLEDs have reached 2.7 Mb/s transmission speeds using on-off keying (OOK) and an ‘offline’ multi-layer perceptron artificial neural network (ANN) based equalizer [2]. On the other hand, inorganic VLC offers data rates up to 3.4 Gb/s [3] using discrete multi-tone modulation and wavelength division multiplexing of red, green and blue wavelengths. Thus it is clear that the state-of-the-art transmission speed in OLED-VLC currently lags LED-VLC by around three orders of magnitude. The reason for this disparity is because organic semiconductors are characterized by lower charge mobility than inorganic LEDs by several orders of magnitude. Typical hole mobilities of the semiconductors used in PLEDs are in the range 10−6-10−2 cm2/Vs, and similar or lower mobilities are found for electrons. Therefore, upon device switch off, extraction of the charge and extinction of the electroluminescence is therefore slow, despite an exciton lifetime of (typically) less than a nanosecond. The bandwidth is therefore several orders of magnitude smaller than for inorganic devices. In this work we report an increase in the transmission speed for PLED-VLC up to 10 Mb/s using a custom designed PLED with a bandwidth of 270 kHz as the transmitter with a PIN photodetector as the receiver. Such a data rate is achieved using a least mean squares (LMS) adaptive equalizer implemented as a finite impulse response (FIR) filter on a Xilinx Virtex 6 ML605 field programmable gate array (FPGA) in real time. All the previous literature on increasing data rates in organic VLC using equalizers has relied on offline processing in MATLAB [2] and hence this is the first time a real time system is reported.

2. Production and characterization of the polymer light-emitting diodes under test

A schematic of the PLEDs used in this work is illustrated in Fig. 1. PLEDs were prepared starting with a transparent anode comprised of a thin layer (~120 nm) of indium tin oxide (ITO) deposited via a sputtering process on a glass substrate. The ITO surface was cleaned in an acetone and isopropanol sonication bath followed by an oxygen plasma treatment [7,8]. Immediately after the oxygen plasma treatment, we spin coated (4,500 rpm for 60 s plus 5,000 rpm for 10 s in air) a dispersion 2.8% w/w in H2O of the polymer PEDOT:PSS (Sigma-Aldrich) to obtain a highly conductive polymeric film approximately 80 nm thick. The sample was then annealed at 140 °C for 600 s in a nitrogen atmosphere. A solution 2% w/w in p-xylene of the polymer TFB (American Dye Source) with a molecular weight Mw = 68,000 is then spin coated (2,500 rpm for 60 s under nitrogen atmosphere) on the sample followed by annealing (140 °C for ~1 hour) and slow cooling to increase the crystallinity of the TFB layer. The amorphous portion of TFB is then removed via spin rinsing (1,000 rpm for 30 s and 4,500 rpm for 10 s) with p-xylene in which the solvent was added drop-by-drop while spinning.

 figure: Fig. 1

Fig. 1 A schematic of the PLED used in this work. The devices are composed of a stack of several thin polymeric layers encapsulated between two planar electrodes. The anode is a transparent conductive layer of ITO deposited on a glass substrate via a sputtering process. A hole injection layer made of a conjugated polymer poly(3,4-ethylenedioxythiophene) and poly(styrenesulfonate) (the mix is referred to as PEDOT:PSS) is in contact with the anode. On top of it, the conjugated polymer poly[(9’9’-dioctylfluorene-alt-N-(4-butylphenyl)diphenylamine] (TFB) acts as electron-blocking/hole-transporting interlayer [46]. The emissive polymer poly[2-methoxy-5-(3′,7′-dimethyloctyloxy)-1,4-phenylenevinylene] (MDMO-PPV) is deposited on top of the TFB and is in direct contact with the metallic calcium cathode which is in turn covered by a layer of aluminum as a protection against oxidation.

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To deposit the active layer we spin coated (1,800 rpm for 60 s) a solution of poly [2-methoxy-5-(3′,7′-dimethyloctyloxy)-1,4-phenylenevinylene] (MDMO-PPV) with a Mn of ~23,000 g/mol (Sigma-Aldrich) 1% w/w in toluene. A metallic calcium cathode 30 nm thick was evaporated onto the active layer and subsequently covered with a 150 nm layer of aluminum as a protection against oxidation. For the evaporation of the cathode we used a mask to produce eight different pixels, see Fig. 1. The active area of each pixel is of about 3.5 mm2 and it is given by the intersection between the ITO stripe and the calcium layer. The corresponding energy levels are shown in Fig. 2.

 figure: Fig. 2

Fig. 2 The energy-level diagram, relative to vacuum, of the isolated materials used in the fabrication of the PLED. HOMO and LUMO stand for ‘highest occupied molecular orbital’ and ‘lowest unoccupied molecular orbital’ respectively. They indicate the two energy levels of the molecule that are responsible for its semiconductor behavior in the same way as valence and conduction bands in inorganic semiconductors. The HOMO and LUMO values for TFB and MDMO-PPV are measured by a combination of cyclic voltammetry and optical absorption [9, 10]. The Fermi levels of the electrodes are also reported [8].

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The normalized optical emission intensity for each polymer were measured using an Andor spectrometer (Shamrock 163 spectrograph with an Andor Newton EMCCD camera) and are shown in Fig. 3(a). The PLEDs have a peak wavelength of 630 nm, with a pronounced shoulder at ~595 nm. The voltage-current and voltage-optical power (JLV) relationships were measured using a Keithley 2400 voltage source, which supplied and measured the drive voltage and current. A Keithley 2000 digital multi-meter is used to measure the voltage from the photodetector, which was converted to the received optical power in MATLAB using the responsivity curve of the silicon photodetector. The JLV response was measured from 0 to 8 V as shown in Fig. 3(b). The operating voltage during the transmission tests was set at 8 VDC as this value is well above the turn-on for luminescence, therefore offering a milder non-linearity and less distortion to the transmission signal. Although at the limit of the range shown in Fig. 3(b), we did not observe any significant degradation in the device operation during our experiments.

 figure: Fig. 3

Fig. 3 The PLED characteristics: (a) the normalized optical spectra and the responsivity of the ThorLabs PDA36A PD, and (b) the JLV relationship, with VON at ~2 V; note the semi-logarithmic axes.

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The equalization of the Fermi levels of the electrodes generates a built-in voltage (VBI) across the semiconductor layers inside the device. When the voltage supplied to the device is above VBI a bipolar injection into the emitting polymer occurs and electroluminescence ensues. The device used in this work shows a peak external quantum efficiency of 1.9% when driving the LED with 72 mA/cm2 current density and an applied voltage of 7.2 V as shown in Fig. 4(a). Finally, the device bandwidth was measured by transmission of a frequency swept sinusoid (20 kHz – 1MHz) under the following operating conditions: 8 VDC, 4 VAC. At the receiver an Agilent N9010A electrical spectrum analyzer measured the magnitude response of the received sinusoid over the given frequency range. Subsequently the light was switched off and a noise measurement was made over the same range. The bandwidth and noise measurements are illustrated in Fig. 4(b) along with the 270 kHz 3-dB point.

 figure: Fig. 4

Fig. 4 The PLED: (a) current efficiency (cd/A) and external quantum efficiency (%) as a function of the current density and (b) the device frequency response (red) and the noise profile (black).

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3. Experimental Test Setup and Least Mean Squares Equalizer

The schematic block diagram of the experimental test setup is illustrated in Fig. 5.

 figure: Fig. 5

Fig. 5 Block diagram of the experimental test setup.

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A 210-1 length pseudorandom binary sequence data pattern ai is generated in LabVIEW and mapped onto the OOK modulation format using a unit height pulse shaping filter p(t). The output of the pulse shaping filter is loaded into the memory of the function generator and is internally shifted by a pre-defined DC level prior to driving the PLED to ensure operation in the linear region x(t). The amplitude of the data is set to 4 VAC and is biased at 8 VDC. The PLED converts the electronic data into an optical intensity I(t). The radiation pattern of the PLED is assumed to be Lambertian and the mathematics can be referred to in [11]. The optical intensity propagates over the channel h(t), which can be modeled as a DC gain less than unity [11]:

h=ξAd2I(θ)cos(ϑ)
where A is the photodetector area (13 mm2), d is the link distance (5 cm), θ and ϑ are the angles of emission and incidence from the PLED and to the photodetector, respectively. In order to achieve the best signal quality with the highest received optical power, a line of sight configuration with θ = ϑ = 0° is adopted in this work. Note that the PLEDs were not encapsulated, instead they were set up in a pumped vacuum environment; however encapsulation is not expected to deteriorate the overall performance. The emitted light from the PLED propagates through a glass window with a small optical transmission loss (~10%). Therefore ξ is introduced as a proportionality factor to account for the silica window.

No focusing optics were used in the measurements and the distance between PLED and a ThorLabs PDA36A PIN photodetector (with 5.5 MHz bandwidth with an inbuilt transimpedance gain of 10 dB) was ~0.05 m. This is a very short distance in comparison to a full room scale and the reason is because the experiment was performed using singular pixels (~3.5 mm2) where the brightness was relatively low. To increase the transmission distance (> 1 m) for future applications, the solution is to simply scale up the amount of PLEDs until the minimum desired optical power is collected at the receiver. There are several sources of noise n(t) including ambient, thermal and shot noise. To minimize the ambient noise, the experiment was conducted in a pitch black laboratory. The thermal and shot noise sources are assumed to be additive white Gaussian noise (AWGN) as stated in [11,12].

The received signal y(t) = Gℜ[h(t) * s(t) + n(t)] is captured and sampled by a Tektronix MDO4104-6 real time oscilloscope with the output given by:

yi=G[yih0+j=jiyjhij+ni]
where ℜ is the photodiode responsivity, G is the 10 dB transimpedance gain, hi is the sampled channel impulse response, i is the current sampling instance, j represents the contributions of the inter-symbol interference (ISI) and ni is a zero mean Gaussian random variable with variance N0/2 representing the noise at each sample. The data yi is acquired by a PC via a LabVIEW script where synchronization with the transmitted data (clock synchronisation in Fig. 5) is carried out before being passed through a low pass filter (LPF) to remove the high frequency noise components. Both synchronisation and LPF are not performed in the FPGA domain; this is to ensure that any errors introduced in the system are due to the equalizer in this first demonstration of such a link.

To combat ISI, equalizers are the most effective solution; they are typically implemented as digital finite impulse response (FIR) transversal filters with adjustable coefficients. The adjustment of the equalizer coefficients is usually carried out adaptively during the transmission process. During the start-up period a short known training sequence is transmitted for the purpose of initial adjustment of the tapped weight coefficients of the filter. The accuracy of the channel estimation, which essentially resolves the convergence and performance of equalization, can be affected either by the length of the training or pilot sequence, or the period between channel estimations. Typically using a higher number of taps will result in better system response estimation. Likewise, a long training sequence will also result in a better estimation since the impact of noise is reduced. On the other hand a high number of taps require more computational resources while a long training sequence introduces more redundancy into the system due to the requirement for retraining. The tap coefficients are determined using an iterative procedure. The most popular algorithms for determining the tap coefficients are the LMS, recursive least squares (RLS) and its derivatives, fast RLS, and gradient RLS. Here we employ the LMS method in conjunction with the (symbol spaced) linear transversal FIR filter since it is the least computationally complex of the training algorithms and requires no matrix inversion unlike RLS algorithms. The received samples di are streamed from a PC to the FPGA via a JTAG Ethernet connection and subsequently down-sampled to one sample-per-bit using a mid-point sampler before being passed through the filter. Down-sampling, equalization, threshold detection and BERT are all implemented on the FPGA board (Xilinx Virtex 6 ML605). The Xilinx ISE software is used to download the synthesized VHDL codes onto the board. The tap coefficients are updated as follows [13]:

wi+1(m)=wi(m)+μeidi
where di is the incoming noise and interference perturbed downsampled symbol, wi(m) is the mth filter weight at sample instant i, and μ is the learning rate parameter (set to 0.001) for every experiment in this work. Setting μ excessively will lead to instability in the equalizer (i.e. never converging) while setting μ insufficiently will result in slow convergence. The value selected for μ is relatively small; however the training length is set to the first 100,000 samples thus providing ample time for convergence. Reducing the training sequence length will deteriorate the channel estimation but reduces the SNR penalty and improves the data throughput.

Once the system response is estimated, the inverse of the system response is applied to the received symbols by means of tapped weight coefficients in order to recover the original symbols. The system is stationary meaning that training only occurs once at the start of each measurement. For non-stationary systems it would be expected that a shorter training sequence with a larger learning rate parameter would be used due to the need to retrain the tap coefficients when the system response is changing. The output of the equalizer is given as [13]:

qi=m=0Nwi(m)dim
where N is the number of taps; N = {3; 5; 7; 10; 15; 20; 25}. The maximum number of taps available for this LMS transversal equalizer is 25. The bottleneck is clearly in the IOBs, which are fully utilized with a 25-tap LMS filter. The rest of the resources are not close to the capacity (the next most utilized feature is the DSP48s at 27%).

3. Results

The bit error rate (BER) performance of the system without an equalizer and measured with a symbol-by-symbol threshold detector is shown in Fig. 6(a). Also shown is the Q-factor. It is possible to transmit up to 3 Mb/s without the use of an equalizer in the real time scenario. This is a faster data rate than is currently available in the state-of-the-art organic VLC; which is currently limited to 2.7 Mb/s using a highly computationally complex ANN equalizer [2]. Aside from the device materials, which can’t be controlled, the key difference between the devices is the bandwidth (~270 kHz in this work and ~90 kHz in [2]) due to the photoactive areas; ~3.5 mm2 here and ~4900 mm2 in [2]. The measured, smoothed and exponentially fitted signal to noise ratio (SNR) are shown in Fig. 6(b); the measurement was made by subtracting the system magnitude response from the system noise floor (refer to Fig. 4(b)) between 20 kHz – 1 MHz. At 4 MHz the predicted SNR is ~14 dB, which is sufficient for an OOK link at a BER of 10−6. Thus it is possible to infer that the link fails as result of higher ISI contributions due to the transmission data rate far exceeding the modulation bandwidth. Also shown in inset are the captured eye diagrams.

 figure: Fig. 6

Fig. 6 (a) The system BER and Q-factor performance as a function of data rate; 3 Mb/s can be achieved without the use of an equalizer. At 4 Mb/s the link fails and errors are introduced into the system; eye diagrams are shown inset. (b) The SNR measured throughout the system from 20 kHz – 1 MHz using an Agilent N9010A electrical spectrum analyzer. The SNR is smoothed and fitted exponentially to predict the SNR at higher data rates.

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In order to further improve the available data rate in PLED-VLC systems, it is necssary to utilise an equalizer as mentioned above. The LMS equalizer with N-taps as previously described is implemented on the ML605 FPGA board with the BER measurements repeated for a range of data rates. The BER performance of the FPGA filter in real time is depicted in Fig. 7 showing an improvement with an the increase in the number of taps. For N = {3; 5; 7; 10; 15} taps and at a BER of 10−6 it is possible to increase the data rate by 3 Mb/s to 6 Mb/s compared to the simple threshold detection scheme. For N = {20; 25} taps the available error free transmission speed is up to 7 Mb/s at the same BER. This is a significant increase in the available data rate not only in relation to the threshold detector case (>100%) but also in comparison to the literature [2] with a significantly less complex offline ANN equalizer and also in real time using the FPGA. For data rates >7 Mb/s symbols cannot be recovered with an acceptable BER. For example, at 8 Mb/s and referring to Fig. 6(b) the predicted SNR is ~5 dB and it is for this reason that the equalizer fails because it cannot filter uncorrelated, and unbounded AWGN.

 figure: Fig. 7

Fig. 7 BER performance of the PLED-VLC system with the FPGA based LMS equalizer; clearly there as an increase in performance with an increasing number of taps as expected; the key result is that the 10 Mb/s link has a BER within the FEC limit; meaning that the data can be recovered with an overhead of just 7%.

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Thus it is necessary to introduce a BER limit for forward error correction (FEC) at 4.6 × 10−3, at the cost of 7% increase in the overhead [14], as is a common practice in high speed VLCs [3, 15]. The limit is indicated by the dashed line in Fig. 7 and it is clear that data rates can be increased to 10 Mb/s using N = 20 and 25 tapped weight coefficients. The performance of an equalizer with N = {5; 7; 10; 15} taps show BER of ~0.006 – 0.007 and thus slightly exceeding the FEC limit, while N = 3 taps fails to converge to the target value. The predicted SNR at a frequency of 10 MHz is < 5 dB, where the performance is decending into the noise floor, which is benefiting from the long training length with numerous tapped weight coefficients in order to compose an accurate account of the channel. Having a FEC overhead of 7% means that the line rate of 10 Mb/s would be reduced to 9.3 Mb/s.

Overall this demonstration of a real time PLED-VLC system operating at an overall data rate of 10 Mb/s is the first real landmark in high speed organic based VLC systems. This work represents three separate increases in the current state-of-the-art data rates over the 2.7 Mb/s reported in [2]. Firstly by using a custom produced PLED with ~3 times larger bandwidth a data rate of 3 Mb/s was possible with simple threshold detection. Secondly using the FPGA based LMS equalizer at a BER target of 10−6 a data rate of 7 Mb/s can be readily achieved. Finally by introducing the FEC BER limit of 4.6 × 10−3 an overall transmission speed of 10 Mb/s could be achieved. Removing the 7% redundancy gives an overall information rate of 9.3 Mb/s, or an increase over [2] by ~3.5 times whilst using a significantly less computationally complex equalizer.

7. Conclusion

In this work a 10 Mb/s VLC link was implemented using a PLED for the very first time. This transmission speed was achieved at the FEC BER target of 4.6 × 10−3 at the cost of a 7% overhead. An LMS equalizer was also adopted and implemented on the Xilinx Virtex 6 ML605 FPGA board with 20 and 25 taps. Using 15-tap or fewer does not provide sufficient performance to achieve such a transmission speed. This is a significant step for the future of PLED-VLC systems as such a data rate is sufficient for an Ethernet connection.

Acknowledgments

The authors would like to acknowledge C. Soos of the European Organization for Nuclear Research (CERN), R. Bouziane and I. Darwazeh of University College London (UCL) for fruitful discussions on the subject of VHDL and best practices and providing the test and measurement equipment, respectively. This work was supported by the EU COST Action IC1101, the EPSRC and the EU FP7 Marie Curie ITN GENIUS - grant number PITN-CT-2010-264694.

References and links

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Figures (7)

Fig. 1
Fig. 1 A schematic of the PLED used in this work. The devices are composed of a stack of several thin polymeric layers encapsulated between two planar electrodes. The anode is a transparent conductive layer of ITO deposited on a glass substrate via a sputtering process. A hole injection layer made of a conjugated polymer poly(3,4-ethylenedioxythiophene) and poly(styrenesulfonate) (the mix is referred to as PEDOT:PSS) is in contact with the anode. On top of it, the conjugated polymer poly[(9’9’-dioctylfluorene-alt-N-(4-butylphenyl)diphenylamine] (TFB) acts as electron-blocking/hole-transporting interlayer [46]. The emissive polymer poly[2-methoxy-5-(3′,7′-dimethyloctyloxy)-1,4-phenylenevinylene] (MDMO-PPV) is deposited on top of the TFB and is in direct contact with the metallic calcium cathode which is in turn covered by a layer of aluminum as a protection against oxidation.
Fig. 2
Fig. 2 The energy-level diagram, relative to vacuum, of the isolated materials used in the fabrication of the PLED. HOMO and LUMO stand for ‘highest occupied molecular orbital’ and ‘lowest unoccupied molecular orbital’ respectively. They indicate the two energy levels of the molecule that are responsible for its semiconductor behavior in the same way as valence and conduction bands in inorganic semiconductors. The HOMO and LUMO values for TFB and MDMO-PPV are measured by a combination of cyclic voltammetry and optical absorption [9, 10]. The Fermi levels of the electrodes are also reported [8].
Fig. 3
Fig. 3 The PLED characteristics: (a) the normalized optical spectra and the responsivity of the ThorLabs PDA36A PD, and (b) the JLV relationship, with VON at ~2 V; note the semi-logarithmic axes.
Fig. 4
Fig. 4 The PLED: (a) current efficiency (cd/A) and external quantum efficiency (%) as a function of the current density and (b) the device frequency response (red) and the noise profile (black).
Fig. 5
Fig. 5 Block diagram of the experimental test setup.
Fig. 6
Fig. 6 (a) The system BER and Q-factor performance as a function of data rate; 3 Mb/s can be achieved without the use of an equalizer. At 4 Mb/s the link fails and errors are introduced into the system; eye diagrams are shown inset. (b) The SNR measured throughout the system from 20 kHz – 1 MHz using an Agilent N9010A electrical spectrum analyzer. The SNR is smoothed and fitted exponentially to predict the SNR at higher data rates.
Fig. 7
Fig. 7 BER performance of the PLED-VLC system with the FPGA based LMS equalizer; clearly there as an increase in performance with an increasing number of taps as expected; the key result is that the 10 Mb/s link has a BER within the FEC limit; meaning that the data can be recovered with an overhead of just 7%.

Equations (4)

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h=ξ A d 2 I( θ )cos( ϑ )
y i =G[ y i h 0 + j= ji y j h ij + n i ]
w i+1 ( m )= w i ( m )+μ e i d i
q i = m=0 N w i (m) d im
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