1. Introduction

Silicon photonics (SiPh) platform is maturing as a commercially viable technology for interconnects in advanced computing and data center systems requiring 100 Gbps and beyond. Such systems benefit greatly from improved bandwidth density and energy efficiency offered by ultra-compact and ultra-efficient wavelength division multiplexing (WDM) achievable with SiPh [1–3]. A breakdown of a demonstrative 4λ x 25 Gbps receiver comprising components that have been demonstrated on the 130 nm SOI platform is presented in Table 1. Using mature 25 Gbps components, it is possible to construct a fully integrated 100 Gbps receiver in less than 1 mm² while consuming less than 220 mW of power. As all the buildings blocks for such compact and efficient system have already been demonstrated, it is becoming increasingly more important to address the issue of robust operation in realistic operating conditions.

Table 1. Area and power breakdown of a 4λ x 25 Gbps SiPh receiver

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An important consideration is polarization-insensitive operation of the receivers in fiber links, as the state of polarization of the incident light at the receiver is unpredictable and time-varying due to polarization rotation and coupling in a single mode fiber [5]. While polarization maintaining fiber can mitigate this problem, it is not compatible with existing infrastructures and is prohibitively expensive. Therefore, the receiver must be designed for polarization-insensitive operation.

SiPh devices are inherently polarization dependent due to their high index contrast and non-symmetric cross-section, making polarization-insensitive operation a challenge at every stage from coupling to guiding to demultiplexing. One path to polarization-insensitive operation is to use edge couplers, which couples the incident light to TE and TM mode of the on-chip waveguide before demultiplexing and detection [6]. Such an approach requires separate designs for individual polarization signal path, making matching of the channels between the two polarizations a challenge. A polarization splitter and rotator can be used after the edge coupler to avoid this problem, at the cost of additional insertion loss [7]. Our preferred approach is to use a Polarization Splitting Grating Coupler (PSGC), which directly projects both incident polarizations into TE mode of two orthogonal on-chip waveguides, which can then be demultiplexed and detected using identical signal paths [8], allowing easy channel matching. We built upon this PSGC-based architecture and implemented a robust control system to demonstrate error-free operation of a polarization and temperature-insensitive SiPh WDM receiver.

2. Robust, polarization and temperature-insensitive WDM receiver

We designed a 4-channel ring-based WDM receiver with a 5 nm channel spacing for total data rate of 100 Gbps as schematically shown in Fig. 1(a). The input light from a single mode fiber is first coupled onto the receiver through a PSGC. The PSGC at the heart of this receiver is a custom designed surface-normal fiber coupler with measured insertion loss (IL) of 4.5 dB, 1 dB BW greater than 25 nm, and less than 0.5 dB of polarization dependent loss (PDL).This grating coupler has two output arms guiding the fundamental TE mode, each containing the respective orthogonal projection of the input signal. Each arm is then directed to a dedicated bank of 4 first-order ring demultiplexers with integrated Si heaters with the parameters described in Table 2. The through-port response of the two arms of the receiver as fabricated without any thermal tuning is plotted in Fig. 1(b), which shows good matching between the two rings of the same channel.

 

Fig. 1 (a) Schematic of the receiver. (b) As-fabricated through-port response of the two arms of the receiver. (c) Microscope image of the PSGC and receiver.

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Table 2. Ring demux design parameters

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The demultiplexed signal is then routed to a shared high-speed, 15µm-long germanium PIN photodetector (Ge PD) with responsivity of 0.9 A/W. Due to matching of the two optical paths, the two demultiplexed signals are then summed up in the photocurrent-domain without any additional dispersive signal degradation. This optical circuit was fabricated in a commercial 130 nm SOI CMOS platform with a 300 nm silicon layer and 800 nm buried oxide. Die micrograph is shown in Fig. 1(c).

In order to stabilize silicon ring resonators’ sensitivity to environmental thermal fluctuations, we designed and implemented a robust feedback loop to lock individual rings to its wavelength channel while using a shared photodetector for each WDM channel. Multiple stabilization approaches have been previously demonstrated [3,9–12], and the Bang-bang controller was chosen for its low power and compact circuit implementation as we have previously shown in a fully-integrated transmitter [3]. We implemented this controller on a Programmable System on Chip (PSoC3) from Cypress Semiconductor to allow a rapid proof-of-concept demonstration.

For this work, we RF-probed the Ge PD and used a bias-T to separate the low-frequency feedback signal and high-speed data signal. The DC-port of the bias-T was then biased at −3 V and amplified using an SRS570 external TIA to generate the feedback signal to be digitized by the control-loop ADC, and the RF-port output was amplified by a SHF810 amplifier for bit error rate (BER) measurements. In a fully-integrated implementation, the out-of-band feedback signal would be readily available from a DC-offset compensation loop [13], avoiding any sensitivity degradation or additional circuitries.

The control and locking of individual rings comprise three steps as shown in Fig. 2(a) – measure baseline, apply incremental heater voltage, then evaluate error signal (defined as photocurrent measured after heater increment minus the baseline photocurrent) to increment or decrement the heater level during the next iteration.

 

Fig. 2 (a) Flowchart of the control algorithm. (b) Slowed-down locking dynamic of the control-loop.

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First, the baseline measurement serves as continuous refreshing of the decision threshold in a simple bang-bang controller, improving the receiver’s robustness to input power variation and eliminating the need for threshold initialization at startup. Each WDM channel is detected by an integrated Ge PD shared between the two polarization components, which is amplified by a TIA and then digitized by a 16-bit ADC for input into the control loop. After measuring the baseline level, a positive or negative increment of 16 mV is applied to the current heater voltage through an 8-bit DAC (negative increment shown in figure, resulting in blueshift of resonance). Once the heater has settled, the photocurrent level is measured again and compared against the baseline. The sign of the heater increment for the next loop cycle is either maintained if the photocurrent has increased (i.e. ring resonance moved in the correct direction), or reversed if decreased. These three steps are then repeated for the other ring that shares the PD, completing one loop cycle. Higher order ring filters can also be locked as a natural extension, because individual rings forming a higher order filter can be independently optimized using the same steps above to achieve global maximum in photocurrent. We note that in principle, the two rings can be controlled as a single entity to simplify the feedback loop by accepting small power penalty from resonance misalignment (<0.3 nm observed) or by using a static correction heater in addition to the main heater. This loop was set to repeat every 2 ms, limited by the slow electrical response of the DC port of the bias-T, but it can be made as fast as just a few thermal time constants in duration (<50 µs), which is sufficiently fast with respect to change in the input state of polarization [5] and the thermal time constant of environmental temperature change. The loop eventually settles into a locked state corresponding to the maximum transmission at the ring filter drop port, alternating between positive and negative increments, as shown in Fig. 2(b).

3. Error-free operation with polarization scrambling and channel drift

We first characterized excess receiver loss defined as the total loss from the input fiber to demultiplexed photocurrent at channel 1 to be 6.6 dB, out of which 4.5 dB is attributed to the PSGC. Observed PDL is small due to the optimized PSGC design and mirror-image layout of the two polarization paths with good matching characteristics. As a result, we observed less than 1 dB power penalty (@1E-12) between fixed state of polarization corresponding to maximum photocurrent and scrambled-polarization state.

We now show the importance of polarization diversity by simulating a non-polarization diverse receiver, by intentionally detuning the ring demux in one polarization arm. All following measurements were performed using 2⁷-1 PRBS modulated optical signal. When we applied a polarization-scrambled input signal, we observed complete eye closure as shown in top of Fig. 3(a). We then aligned the two demux for polarization-insensitive operation, which opened up the completely closed eye as shown in the bottom.

 

Fig. 3 (a) Received 25Gbps electrical eye diagrams of input with polarization scrambling. (b) BER curve showing negligible power penalty of the control loop. (c) Received 25 Gbps electrical eye diagrams under free-running and closed-loop operation with polarization scrambling.

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We then compared the receiver sensitivity in closed-loop operation versus manually optimized ring demux alignment and present the data is Fig. 3(b). Observed power penalty is approximately 0.1 dB even with polarization-scrambled input, demonstrating the robustness of the adaptive bang-bang controller.

The robust feedback controller allows for operation of the WDM receiver in the presence of environmental temperature fluctuations. We simulated such fluctuations by changing the input signal wavelength as a proxy to avoid mechanical coupling drift from thermal expansion. Over 4.5 nm change in input wavelength, corresponding to more than 60°C change in temperature, we did not observe any degradation in the eye diagram under closed-loop operation while open-loop eye diagrams rapidly closed, as shown in Fig. 3(c).

Based on the robust operation of the receiver under all input polarization and wavelength change, we individually tested all four channels of the receiver and demonstrated error-free performance across all four channels spanning 15 nm. Individual channel’s input wavelength variation was limited to 4.5 nm to avoid adjacent channel overlap, while channel 4 was limited to 3.5 nm. However, available thermal tuning range exceeded 7 nm, which can be further extended and made more power efficient by using selective removal of SOI handler substrate [2]. Figure 4 shows the BER curves for all four channels which were individually tested, plotted against optical modulation amplitude (OMA) launched into the PSGC. The plot clearly indicates error-free operation over all wavelengths across all four channels under any input polarization state, demonstrating an aggregated data rate of 100 Gbps.

 

Fig. 4 BER curves for all four channels of the polarization insensitive receiver over 4.5 nm variation in input wavelength.

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4. Conclusion

We have demonstrated a robust, polarization and temperature insensitive 4λ x 25 Gbps WDM receiver. Negligible power penalty was observed for closed-loop operation using our bang-bang controller. We showed successful stabilization of the receiver under polarization scrambled input condition over input wavelength change of 4.5 nm, corresponding to greater than 60°C in temperature fluctuation, and demonstrated error-free transmission for all four channels. This demonstration shows that ring-resonator based receiver can be operated under realistic operating conditions, paving the way for ultra-compact and low-power long-range WDM SiPh interconnects.