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Abstract
A two-dimensional single-photon imaging system with high sensitivity and high time resolution is the ultimate camera and useful in a wide range of fields. A superconducting nanowire single-photon detector (SSPD or SNSPD) is one of the best candidates for realizing such an ultimate camera due to its high detection efficiency in a wide spectral range, low dark count rate without after-pulsing, and excellent time resolution. Here we propose a new readout scheme to realize a large-scale imaging array based on SSPD, where a row–column readout architecture is combined with a digital signal processor based on a single-flux-quantum (SFQ) circuit. A 16-pixel row–column readout SSPD array is fabricated and measured with an SFQ digital signal processor. We successfully acquired spatial information as encoded digital bit codes with the temporal information of the photon detection. The system timing jitter was measured as <80 ps for all 16 pixels even through the SFQ signal processor, indicating the potential for an imaging array with an extremely high time resolution.
© 2020 Optical Society of America under the terms of the OSA Open Access Publishing Agreement
1. Introduction
Ultra-sensitive, high spatial-, and high temporal-resolution single-photon imaging sensors are expected to be an innovative technology in a wide range of fields, such as biological imaging, remote sensing, and future optical quantum science and technology. Superconducting nanowire single-photon detectors (SSPDs or SNSPDs) [1–3] are one of the notable candidates for configuring pixels in single-photon imaging sensors because the SSPD is sensitive to photons of various wavelengths ranging from visible to mid-infrared light and can achieve high system detection efficiency (e.g., higher than 90% for 1,550 nm wavelength photons) [4–8]. The SSPD also has a high time resolution (small jitter <100 ps) and a high maximum counting rate and can achieve an extremely low dark count rate without after-pulsing. The excellent total single-photon detection performance of the SSPD significantly exceeds those of avalanche photo diodes and photomultiplier tubes. The SSPD with a photosensitive pixel has already been used in a wide range of research fields, such as a biological observation [9,10], light detection and ranging [11,12], and quantum information and communication [13–15]. Recently, significant efforts are being made to realize an SSPD array with a large number of pixels [16–18], but the primary issue is to reduce the number of readout cables that increase the heat load to the cryocooler. Several readout techniques to reduce the number of readout coaxial cables have been demonstrated, including row–column readout architecture [18,19], frequency multiplexing [20], time-tagged multiplexing [21], and pulse amplitude multiplexing [22,23]. A delay-line-based SSPD imager has been also demonstrated with 590 effective pixels [17]. Recently, Wollman et al. has reported a 32 × 32-pixel SSPD array using row–column readout architecture [24], where 64 cables are used for the signal readout. When the number of pixels reaches 10,000, the row–column readout architecture requires as many as 200 readout cables, which are not easy to implement in a compact cryocooler.
We have proposed digital multiplexing using a cryogenic superconducting signal processor composed of a single-flux-quantum (SFQ) circuit [25–32]. The SFQ circuit is a low-power logic circuit using the quantized magnetic flux in the superconducting ring as an information carrier and is suitable for operation in a cryogenic environment [33]. We have already demonstrated a 64-pixel SSPD array with an SFQ signal processor [31]. The number of readout cables in the row–column architecture can be reduced further by adopting cryogenic digital multiplexing, which enables the smart implementation of large-scale SSPD-based imaging array in a compact cryocooler. As proof of concept, a 4 × 4-pixel SSPD array with a row–column readout architecture is fabricated and measured with an SFQ signal processor. In this paper, we report the full operation of the 4 × 4-pixel SSPD array system in a 0.1 W Gifford–McMahon (GM) cryocooler system.
2. Development of NbTiN SSPD array system
Figure 1 shows a conceptual circuit diagram of the N × N-pixel SSPD array system adopting row–column readout architecture [18] and the SFQ-based signal processor. The N × N pixels are arranged in a matrix, and each pixel is connected to row and column wirings (represented by red and blue lines in Fig. 1, respectively). The bias current is fed into the cryocooler via a single coaxial cable and distributed to all pixels in parallel via a superconducting inductor (Lb) with large inductance, the reactance of which for the fast response signal of the SSPD is much larger than the load impedance. Therefore, a positive current pulse appears at the row output at each photon detection. The resistors with identical values (Rp) are connected in series to superconducting nanowires to distribute the bias current uniformly to each pixel. The column wiring is terminated via a superconducting inductor (Ln), the reactance of which is also sufficiently larger than the load impedance. This superconducting inductor with large inductance prevents the bias current from leaking into the column output while it generates a negative current pulse at the column output at each photon detection. As a result, the SSPD array generates a positive current pulse for row readout and a negative current pulse for column readout at each photon detection event. The firing pixel can be identified as a cross point between the row and column addresses, and the N × N-pixel array can be read out using 2 × N wirings.
Fig. 1. Conceptual circuit diagram of the N × N-pixel SSPD array system adopting row–column readout architecture and the SFQ signal processor.
By adopting cryogenic signal processing, positive and negative current pulses from an SSPD array are converted to SFQ pulses and encoded into digital bit codes according to their input addresses. A magnetically coupled (MC)-DC/SFQ converter [26,34] was used as a front-end circuit to generate SFQ pulses. The MC-DC/SFQ converter has an input coil to enhance the input current sensitivity, and each input coil is reversed to detect positive and negative current pulses. The SSPD array and the SFQ signal processor are connected directly without any capacitors, and part of the DC bias current on the row wirings flows to the MC-DC/SFQ converters terminated by 50 Ω input resistors. However, the effect of this leakage current can be cancelled out by the external DC current applied to the control line for the MC-DC/SFQ converters [32]. The generated SFQ pulses are processed in an event-driven SFQ encoder, which outputs a pair of digital bit codes denoting the row and column addresses. The operation of the SFQ encoder is given in detail elsewhere [31,32]. Here, the event-driven SFQ encoder has an internal clock generator and outputs digital bit codes synchronized with the photon detection event. By employing the SFQ signal processor, the number of readout wirings can be reduced from 2 × N to 2 regardless of the number of pixels. As proof of concept, we developed a 4 × 4 = 16-pixel niobium titanium nitride (NbTiN) SSPD array system with an SFQ signal processor.
Figure 2(a) shows a micrograph of a fabricated 4 × 4-pixel NbTiN SSPD array device, and Fig. 2(b) shows a schematic of each pixel, which corresponds to the area surrounded by white dashed lines in Fig. 2(a). A unit pixel size is 15 × 15 µm2, which consists of a 5 × 10 µm2 meandering nanowire as a photosensitive area, a palladium (Pd) resistor, and row and column wirings. The row and coulmn wiring layers are electrically insulated by a silicon monoxide (SiO) layer. The detailed fabrication process is as follows. A 14 nm-thick NbTiN superconducting film was first deposited as a bottom layer on a silicon (Si) wafer with a 250 nm-thick thermally oxidized silicon dioxide (SiO2) layer by DC magnetron reactive sputtering. The NbTiN film was patterned into a 100 nm-wide and 100 nm-space meander-shape nanowire using an electron beam lithography and etched using reactive ion etching (RIE). The NbTiN film was also used for the column wiring. The resistor for bias current supply was formed by a Pd film deposited by DC magnetron sputtering and patterned by a lift-off process. After patterning the photoresist into a 4 × 2 µm2 island shape, a SiO insulation layer was deposited by a thermal evaporation and lifted off to make contact between the following niobium nitride (NbN) layer and bottom NbTiN layer. Finally, a 120 nm-thick NbN superconducting film was deposited by DC magnetron reactive sputtering and patterned into the row wiring using a lift-off process and RIE. The final NbN layer was also used as the peripheral wiring and the contact pad. Unlike our previous single-pixel devices, this device has no cavity or mirror structure for simplifying the fabrication process [7].
Fig. 2. (a) Micrograph of fabricated 4 × 4-pixel NbTiN SSPD array device and (b) schematic drawing of a pixel surrounded by white dashed lines in Fig. 2(a).
We also fabricated film inductors made of NbTiN on two separate chips, one for the bias current supply and one for the termination of column wirings. An 8 nm-thick NbTiN film was deposited on a thermally oxidized Si wafer and patterned into a 5 µm-wide and 63 mm-long meander line to obtain a critical current sufficiently larger than the total bias current for all pixels in each row. The resulting inductance is expected to be 1.44 µH.
Figure 3 shows a micrograph of an SFQ signal processor composed of two four-channel encoders for row and column readout. The SFQ signal processor was fabricated by the niobium (Nb) standard process 2 (STP2) in the clean room for analog–digital superconductivity (CRAVITY) of the National Institute of Advanced Industrial Science and Technology (AIST) [35]. This SFQ signal processor includes approximately 1,212 Josephson junctions and requires a total bias current of 136 mA and consumes a power of 0.34 mW. The power consumption can be further reduced by reducing the design value of the bias voltage to half as is demonstrated with the 2×32-input SFQ signal processor in Ref.32. The minimum input current sensitivity of the MC-DC/SFQ converter in this processor is approximately 10–12 µA, which is enough to detect the output current from the SSPD array.
Fig. 3. Micrograph of an SFQ signal processor composed of two four-channel encoders for row and column readout.
A fabricated 4 × 4-pixel NbTiN SSPD array, two NbTiN inductor circuits, and an SFQ signal processor chip were then integrated into one package, as shown in Fig. 4, and then connected via the printed circuit board (PCB) and bonding wires. The package was then installed in a 0.1 W GM cryocooler and cooled down to 2.3 K. The GM cryocooler system used in this work has 10 coaxial cables: one for biasing the current for the SSPD array, seven for biasing the SFQ signal processor, and two for reading out the output signals. It is worth emphasizing that the number of required cables does not increase as the number of pixels increases.
Fig. 4. Photograph of the fabricated 4 × 4-pixel NbTiN SSPD array, two NbTiN inductor circuits, and an SFQ signal processor chip installed in a specially designed high-frequency circuit package.
3. Experimental results
Prior to the demonstration of the fully implemented SSPD array system shown in Fig. 1, we observed the output signals from the SSPD array directly to confirm the operation of the SSPD array without the SFQ signal processor. A pulsed laser source with a 100 fs pulse width, a wavelength of 1,550 nm, and a repetition rate of 10 MHz was used as a photon source. The number of photons in a pulse was attenuated to 0.1 photons/pulse, and the photons were then introduced in a cryocooler via a single mode optical fiber. The emitting end of the optical fiber was located at the relatively far distance of 5.2 mm above the front face of the SSPD array, and the photons emitted from the optical fiber were uncollimated so that the incident photons irradiated all pixels uniformly. A total bias current (Ib) to the 16-pixel NbTiN SSPD array was set to 420 µA, which is approximately 87.5% of a total switching current (Isw) of 480 µA and corresponds to the bias current of 26.25 µA per pixel. Since each pixel has a 6 Ω series resistor, the SSPD array consumes around 0.07 µW on this bias current condition. The output signals from four row output lines and four column output lines were directly connected to eight coaxial cables and were retrieved to a room-temperature environment and measured through low-noise amplifiers using an oscilloscope.
Figure 5 shows examples of single-shot traces of output signals. The top trace is a signal of the row output, and the bottom trace is a signal of the column output. Note that the low-noise amplifiers used in this experiment inverted the polarity of the output signals. A pair of the positive and negative output signals was observed in synchronization with the laser pulse. We successfully observed the output signal pairs for every combination of 4 × 4 row–column readout. However, the output current amplitude can be estimated as 13.6 µA by considering the gain (45 dB) and the input impedance (50 Ω) of the amplifier. This value is almost half the estimated 26.25 µA bias current for each pixel due to the current leakage to other pixels connected in parallel. The 5 × 10 µm2 photosensitive area in this experiment is relatively small, causing not negligible leakage current. This leakage current appears on each output line as a crosstalk signal having a polarity reversed to that of the photon detection signal. However, this reversed polarity crosstalk signal is not sensed by the MC-DC/SFQ converter and does not affect the operation of the SFQ signal processor, because the MC-DC/SFQ converter is designed to sense only one-way polarity signals. Also, the detection efficiency may fluctuate in the pixels in the same row or column as the firing pixel due to the inflow of the leakage current. However, it can be reduced if the pulse generation probability is sufficiently saturated against the increase of the bias current. The leakage current can be reduced by enlarging the photosensitive area to increase the inductance of meandering nanowire. However, the output current of 13.6 µA is still larger than the input current sensitivity of our SFQ signal processor, so the SFQ signal processor was connected to the 4 × 4-pixel SSPD array with row–column readout architecture.
Fig. 5. Single-shot traces of typical row (top) and column (bottom) signals from the 16-pixel NbTiN SSPD array, which were directly extracted from the cryocooler via eight coaxial cables. The output signal pairs were observed in synchronization with the laser pulse.
Figure 6 shows the single-shot traces of the digital bit codes obtained from output 1 and output 2 in Fig. 1, where the output signals were observed via the low-noise amplifiers using the oscilloscope. In each of the 16 insert graphs, the top trace corresponds with row output, whereas the bottom trace corresponds with column output. The first (leftmost) bit “1” is a “timing bit,” which acts as a time tag of the photon detection event. The subsequent second (minimum digit) and third bits are “address bits” represented in a binary code. For example, the bit code “110” is divided into the timing bit “1” and the address bit “10.” The address bit “10” means the address number “1” in decimal code. All combinations of bit codes from the row output and the column output were successfully acquired in synchronization with the laser pulse, indicating that all 4 × 4 pixels were read correctly through the SFQ signal processor. The SFQ encoder has the internal clock of 100 MHz and requires 4 clock cycles to output the 3-bit signal. Thus, the system has a 40 ns dead time and the maximum count rate limited by the SFQ encoder is 25 MHz. Since the dead time increases in proportion to the number of address bits, the maximum count rate is decreased with the scale-up of the SSPD array. However, the internal clock of the SFQ encoder can be raised to over 10 GHz. Therefore, there is the room for increasing the maximum counting rate as long as the decoding electronics in a room temperature environment can support that rate.
Fig. 6. Single-shot traces of the pairs of digital bit code signals outputted from output 1 and output 2 in Fig. 1. The positive and negative current pulses from the 16-pixel SSPD array were encoded into digital bit codes according to their pixel coordinates via the SFQ signal processor. In each of the 16 insert graphs, the top trace corresponds with row output, and the bottom trace corresponds with column output. These bit code signal pairs were observed in synchronization with the laser pulse.
We also evaluated the system jitter, including the SFQ signal processor. We measured a temporal correlation between the rising edge of the timing bit in the encoded output signal and the sync-out signal of the pulsed laser source using a time-correlated single-photon counting module (HydraHarp 400, PicoQuant GmbH). We tuned the total bias current of the 16-pixel SSPD array to 440 µA, the laser light intensity to 1 photon/pulse, and the counts accumulation time to 30 min. To clarify an individual jitter for each address, we intentionally changed a length of wiring on the PCB. Figure 7 shows the temporal correlation histograms of the row address outputs (top) and column address outputs (bottom). Four time-correlation peaks corresponding to the four different addresses are clearly distinguishable, and the full width at half maximum of the timing jitters calculated from the Gaussian fitting in the histogram are measured to be 68.5–78.5 ps regardless of row and column readout. These values are sufficiently low as timing resolutions of the two-dimensional single-photon imaging system, although these are larger than the typical timing jitter (<50 ps) for an SSPD operating with the bias current of approximately 26 µA. This degradation of the jitter is attributed to the reduction of output current from the SSPD array, which is estimated to be 13–14 µA from Fig. 5. The photosensitive area of each pixel in this demonstration was as small as 5 × 10 µm2 and thus should be increased to increase the output current and improve the system jitter. The current sensitivity of the MC-DC/SFQ converter should also be improved to achieve better timing jitter. Note that the timing jitter of the SFQ signal processor does not increase significantly for larger-scale imaging arrays because the internal timing jitter of the SFQ circuit is as small as a few picoseconds, and the system jitter is almost determined by the jitter in the MC-DC/SFQ converter [29,30].
Fig. 7. Temporal correlation histograms of row address outputs (top) and column address outputs (bottom). Each address output was separated on the time axis by providing a different time delay on the PCB. The full width at half maximum (FWHM) of the timing jitters was calculated from the Gaussian fitting in the histogram.
We designed a 2 × 32-input SFQ signal processor for a 32 × 32-pixel row–column readout architecture [32]. The total DC bias current necessary to drive this signal processor was approximately 170 mA and the power consumption was 0.21 mW, which is small enough to prevent a significant temperature increase of the sample stage in a 0.1 W GM cryocooler, including Joule heating from the bias cable. We have successfully demonstrated the correct operation of the 2 × 32-input SFQ signal processor in a 0.1 W GM cryocooler. The power consumed by bias feed resistors in the 32 × 32-pixel SSPD array is estimated to be 4.15 µW assuming the bias current of 26 µA/pixel, which is much smaller than the power consumption of the SFQ signal processor. The most significant issue is the reduction in output current from the SSPD array due to leakage current, but the output current detectable by the MC-DC/SFQ converter is expected to be obtained even with a 32 × 32-pixel SSPD array by increasing the photosensitive area to 25 × 25 µm2. In the near future, a 32 × 32-pixel SSPD array with row–column readout architecture will be demonstrated with the SFQ signal processor in a 0.1 W GM cryocooler. To realize an even larger-scale imaging array, it is important to reduce the DC bias current for the SFQ signal processor, because our previous studies showed that the applicable DC bias current is limited to less than 300 mA due to Joule heating originated from the contact resistance at the connector. An adiabatic quantum flux parametron (AQFP) circuit can effectively reduce the bias current because it can be driven by an AC current of a few milliamperes regardless of the circuit scale [36,37]. Part of the signal processor may be replaced with AQFP circuits in future 10,000-pixel SSPD arrays. Another issue to scale up the number of pixels in SSPD arrays is to improve the fabrication yield of the NbTiN nanowires. There are several possible causes which limit the yield, such as geometrical ununiformity of nanowire caused by nanofabrication process, superconducting nanowire design, electrical properties and crystal structure of the NbTiN films, and so on. We optimistically believe that the steady improvement and exploration of these causes can increase the yield, making it possible to realize larger SSPD arrays. Furthermore, a superconducting single-photon detector having a micrometer-scale line width that can be fabricated by photolithography has been proposed and demonstrated in recent years [38,39]. Progress in the development of such detector has the potential to significantly improve the fabrication yield and achieve further system scale up.
4. Conclusion
We have demonstrated the operation of NbTiN SSPD array system with a row–column readout architecture and a superconducting digital signal processor. We fabricated the 16-pixel NbTiN SSPD array with row–column readout architecture, an SFQ signal processor, and NbTiN superconducting film inductor circuits and implemented these in one package. We have successfully observed the output signals from all 16 pixels as encoded digital bit codes, including the address and timing information through two coaxial cables from a 0.1 W GM cryocooler operating at a temperature of approximately 2.3 K. The detection timing resolutions (the system timing jitters) were measured as <80 ps for all 16 pixels even through the SFQ signal processor, indicating the potential for an imaging array with a very high time resolution. These results revealed that the combination of the NbTiN SSPD array with row–column readout architecture and an SFQ signal processor can read out the signals using only two output lines and works well in a 0.1 W GM cryocooler system with a small cooling capacity. Our approach using row–column readout architecture and an SFQ processor enables the smart implementation of a large-scale imaging array based on an SSPD in a compact cryocooler.
Funding
Japan Society for the Promotion of Science (JP18H05245, JP19H02206, JP19K15472, JP26249054); Research Foundation for Opto-Science and Technology; Core Research for Evolutional Science and Technology (JPMJCR1671).
Acknowledgments
We would like to thank Saburo Imamura for help with electron beam lithography process. The SFQ signal processor was fabricated in the clean room for analog–digital superconductivity (CRAVITY) of National Institute of Advanced Industrial Science and Technology (AIST) using standard process 2 (STP2).
Disclosures
The authors declare no conflicts of interest.
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