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Abstract
Density-based topology optimization is used to design large-scale, multi-layer grating couplers that comply with commercial foundry fabrication constraints while simultaneously providing beam profiles that efficiently couple to a single-mode optical fiber without additional optics. Specifically, we describe the design process and experimentally demonstrate both single- and dual-polarization grating couplers that couple at normal incidence (0° from the normal) with low backreflections (-13.7 dB and -15.4 dB at the center wavelength), broad 3 dB bandwidths (75 nm and 89 nm), and standard coupling efficiencies (-4.7 dB and -7.0 dB). The dual-polarization grating couplers exhibit over 30 dB of polarization extinction across the entire band. The devices were fabricated on the GlobalFoundries 45CLO CMOS platform and characterized across three separate wafers. This new design approach produces distinct features for multiple foundry layers and yields emitters with arbitrary, user-specified far-field profiles.
© 2022 Optica Publishing Group under the terms of the Optica Open Access Publishing Agreement
1. Introduction
Optical grating couplers offer a flexible and compact solution for routing light on and off integrated photonic chips [1,2] enabling high-density optical interconnects [3–5], heterogeneous integration via optical interposers [6], and even far-field imaging and sensing [7–9]. Despite their apparent utility and ubiquity, however, no single design methodology exploits the full multi-layer, 3D design space to produce efficient couplers with arbitrary far-field patterns and emission angles and broad bandwidths. The process is further complicated when designing within commercial foundry environments, which often enforce strict design rule checks (DRC) that prohibit small features favored by many design algorithms [10,11].
To overcome this challenge, we present and experimentally validate a new large-scale design approach that produces 3D, multi-layer grating couplers specifically designed for commercial foundry platforms and their corresponding packaging constraints using density-based topology optimization (TO, Sec. 2). Specifically, we design single- and dual-polarization, vertical-emitting (0$^{\circ }$ to the normal) grating couplers using the silicon-on-insulator (SOI) and polysilicon (poly-Si) layers of the GlobalFoundries 45CLO foundry process [12]. Our devices are “full-aperture”, occupying 20$\lambda$ in each lateral dimension (on the same scale as the fiber’s mode-field diameter), which is potentially an order of magnitude larger than the current state of the art. The final grating geometries were designed to adhere to thousands of design rule checks, none of which were waived or required special post-processing. Our TO approach to grating design produces unique grating profiles for two material layers in tandem after a few hundred optimization iterations, and only requires a few days of computation on our cluster [13].
Both grating coupler designs were fabricated and tested across three wafers (Sec. 3). While traditional normal-incident gratings exhibit a strong backward-propagating Bragg mode, the measured devices demonstrated suppressed backreflections (-13.7 dB for the single-polarization coupler and -15.4 dB for the dual-polarization variant at the center wavelength). Both devices exhibit a broad 3 dB bandwidth (75 nm and 89 nm), and standard coupling efficiencies (-4.7 dB and -7.0 dB). The dual-polarization grating couplers exhibit over 30 dB of polarization extinction across the band. Remarkably, we observed just 0.89 dB of variation across all single-polarization grating coupler measurements at the center wavelength, indicating that the devices exhibit strong robustness to standard foundry fabrication variability. We identify potential discrepancies between simulation and experiment and discuss potential ways to mitigate this in future work (Sec. 4).
Our work represents a significant departure from common grating coupler design approaches, which often identify a 1D grating periodicity and chirping profile using either fundamental grating theory [1,2,14] or an inverse design algorithm [15–20], and then “extrude” these parameters onto a 2D design (e.g., in a linear or confocal configuration [21]). Occasionally, the resulting geometry requires an adiabatic taper to ensure proper mode matching between the grating structure and its supporting waveguide (in some cases, the taper itself is inverse designed [22]). A direct limitation with these approaches is the inability to design gratings that produce arbitrary (e.g., non-symmetric) far-field patterns (e.g., polarization demultiplexing gratings). In contrast, our work performs a 2D optimization over multiple layers within a 3D simulation environment, offering complete flexibility and freedom over the coupling efficiency, polarization state, far-field profile, and emission angle.
Density-based topology optimization is an inverse-design methodology that parameterizes the design at each individual “pixel” within the design space, which freely evolves between constituent materials such that one or more user-defined figures of merit (FOM) are satisfied [23,24]. Using an adjoint-variable method (AVM), one can efficiently compute gradients of the FOM(s) using just two fullwave Maxwell solves, regardless of the number of design parameters (i.e., design pixels) [25,26]. While both flexible and powerful, two primary challenges often arise with this approach: (1) the overall size of the final device (i.e., the design region) is limited to just a few $\lambda$ in each dimension due to the computational cost of each Maxwell solve [27,28]; (2) both the underlying wave physics and continuous nature inherent to density-based methods often produce non-realistic (or overly sensitive) devices with prohibitively small features not amenable to foundry fabrication. Our recent work introduced a large-scale, hybrid time-/frequency-domain adjoint approach in the context of topology optimization which is capable of scaling to arbitrarily large devices [29]. In addition, we recently demonstrated sophisticated optimization constraints that produce robust designs which also adhere to numerous 1D and 2D fabrication constraints (e.g., minimum linewidth, minimum spacing, minimum area, and minimum enclosed area) [30]. Together, these two innovations enable an unprecedented degree of photonics inverse design which is experimentally realized in this work.
Our results reinforce the idea that non-intuitive design methodologies (i.e., inverse design) are a fundamentally important design resource within foundry-based integrated photonics [31]. The designs produced by our algorithms yield many intuitive features (like apodized, confocal grating lines) at a fraction of the footprint of traditional gratings (i.e., no mode tapers were needed to interface with the gratings). Our approach leverages the simultaneous design of two layers, thereby breaking the structure’s Z-symmetry and corresponding diffraction symmetry, while also providing additional degrees of freedom to further confine and route the incoming fiber mode. Importantly, this work enables the design of complicated emitters, like our dual-polarization grating coupler, where analytic (i.e., intuition-first) theory struggles. Furthermore, we demonstrate that both performance and packaging requirements can be simultaneously achieved within the same design cycle, as demonstrated by the $0^{\circ }$ coupling angle required to achieve large-scale optical flip-chip. We anticipate our results will extend to a wide range of practical, large-scale applications, from designing flat-top gratings [32] customized for external lens systems [33], to compact and multi-wavelength ion traps [34].
2. Design and simulation
We designed the single- and dual-grating couplers using our topology optimization, photonics inverse-design framework [29], where a forward and an adjoint Maxwell solve are performed using the free, open-source finite-difference time-domain (FDTD) package Meep [35]. Gradients of a user-specified FOM at multiple wavelength for all the degrees of freedom are simultaneously computed by strategically combining and scaling the Fourier-transformed fields collected during both runs. A unique advantage to this hybrid time-/frequency-domain approach lies in its ability to systematically scale to geometrically large problems. In contrast, the scalability of explicit frequency-domain solvers is less predictable, as the resulting discretized Maxwell operator is often ill-conditioned, which drastically slows the convergence of iterative methods needed to solve large, 3D problems [36].
We constructed a simple optimization problem seeking to minimize the maximum insertion loss across three discrete wavelengths ($\lambda =$1540 nm, 1550 nm, and 1560 nm). Formulating a broadband, minimax problem offers two important advantages over traditional single-frequency design approaches: (1) a broadband optimization problem prevents any high-Q resonant devices (e.g., those with strict and sensitive phase-matching conditions) from emerging, which often exhibit strong coupling efficiencies, but also tend to be overly sensitive to fabrication variability [30]; (2) unlike other approaches relying on an aggregated objective function (e.g., the mean-squared-error), the minimax approach used here ensures the insertion loss at the worst-performing wavelength point is minimized. Consequently, the method typically encourages a “flat-band” response for the device (although a perfectly flat response is not necessarily achieved, as seen throughout this work). Importantly, if the optimized wavelength points are sufficiently close together, (e.g., span a few percent bandwidth) then the intermediate wavelength points which are not explicitly optimized tend to exhibit a smoothly continuous response.
Deliberately optimizing wavelength points that are too close together, however, is problematic, as the hybrid time-/frequency-domain adjoint formulation generates adjoint current-source terms in both domains, and the Fourier uncertainty principle mandates prohibitively long adjoint simulations in order to resolve these relatively narrow bandwidths [29]. As such, the designer must carefully balance wavelength density and simulation runtime (note that the number of wavelength points itself is not necessarily a limiting factor, provided sufficient compute memory is available to store each wavelength’s fields and gradient, as the hybrid time-/frequency-domain adjoint formulation computes gradients for all specified wavelength points in tandem using the same forward and adjoint runs). As mentioned earlier, we chose a spacing of 10 nm, which heuristically ensures a properly smooth response between each discrete point, without an overly time-consuming adjoint simulation. Regardless, we simulate all of our final devices using a fine wavelength grid with a spacing of 100 pm to properly ensure the device behaves as expected.
We defined the insertion loss (which is also referred to as the coupling efficiency) of each grating coupler as the ratio of power coupled into the fundamental mode of the outgoing silicon waveguide relative to the incoming power of a Gaussian-beam source, which serves as a suitable approximation for the mode profile emitted by a single-mode fiber (SMF) [37]. Alternatively, one could excite the waveguide mode itself and optimize the overlap of the spatial far-field pattern with the SMF mode profile (e.g., using the adjoint formulation of the near-to-far transformation [29]). Reciprocity implies the two approaches are identical, and the former does not require the expensive convolution integrals needed by the near-to-far transformation. Future work involving the design of emitters with arbitrary far-field patterns (e.g., optical vortex beams [27], flat-top gratings [32]) is best implemented using the latter approach, however, due to its generalizability.
Mathematically, this optimization problem corresponds to a differentiable minimax problem [30,38] over the density variables $\rho$ of the form
We simplified the resulting optimization problem and mitigated the computational cost of each simulation by leveraging mirror symmetries. For example, the single-polarization grating coupler exhibits a mirror geometric symmetry across the length of the waveguide and grating structure. Given the additional symmetry of the input fields (from the linearly-polarized Gaussean beam) and the output waveguide mode (fundamental TE), we also implemented a mirror fields symmetry to reduce the total simulation computation by a factor of two. In contrast, the dual-polarization grating coupler exhibits no mirror fields symmetries, as we intend to only couple a single (linear) fiber polarization into one particular output waveguide. However, by enforcing a mirror geometric symmetry across the diagonal of the device, we simplify the corresponding optimization problem significantly. We injected a single (linear) polarization from the fiber and minimized the insertion loss relative to the corresponding output waveguide. Due to the enforced geometric symmetry, the other orthogonal fiber polarization couples identically into the remaining waveguide, thereby alleviating the need for any additional optimization objective functions or constraints. The geometric symmetry condition itself is easily enforceable during the mapping stages of the design variables and only requires one additional vector-Jacobian-product (vJp) during the recombination (or “backpropagation”) step of the AVM [29].
We further reduced the computational cost of each forward and adjoint simulation by shrinking the size of the computational cell. Using complex point theory to describe the Gaussian-beam source [39], the beamwaist and center can be arbitrarily placed independently from the location of the actual planar current source used in the simulation. In other words, the source can describe a fiber located outside the simulation domain, a key feature when designing large-scale devices. For both grating couplers, the waist was specified to match the full width at half maximum (FWHM) of a standard SMF-28 fiber at $\lambda =$1.55 $\mu$m (10.4 $\mu$m) and centered 10 $\mu$m above the device, which roughly corresponds to the cumulative thickness of the back end of line (BEOL) oxide layers. The source plane itself, however, was placed just 1 $\mu$m above the surface of the grating coupler, resulting in a significantly smaller (and computationally cheaper) simulation cell size. The buried-oxide (BOX) layer and underlying silicon handle layer were also included in the simulation domain in order to properly account of all layer interactions.
Both grating couplers were designed using two 10 $\mu$m $\times$ 10 $\mu$m “design regions” with a resolution of 60 pixels/$\mu$m using the SOI and poly-Si layers, resulting in 720,000 total degrees of freedom (360,000 per design region). These design variables undergo a series of linear and nonlinear filter and binarization projection functions (described by the parameter $\beta$) before describing the final 3D geometry of the grating coupler [23,29]. The above mapping functions are coupled with various nonlinear constraint functions ($g_k$) to enforce minimum linewidth, linespacing, area, enclosed area, and curvature constraints dictated by the foundry DRC requirements [30]. We note that the SOI and poly-Si layers each have different DRC requirements, and multiple constraint functions are needed to reflect these differences. Each forward and adjoint simulation was run with a resolution of 30 pixels/$\mu$m, such that the design region resolution matched the corresponding Yee-grid resolution [40]. More detail regarding the density-based parameterization process, along with the parameters used within the various constraint functions, is described in Appendix A.
The optimization process itself is straightforward: (1) choose an initial set of design parameters; (2) evaluate the FOM and compute its gradient by performing a forward and adjoint solve; (3) if applicable, evaluate any constraint functions and compute their corresponding gradients; (4) repeat the above steps using a new set of design parameters provided by the optimizer. As an initial condition for both grating couplers, we used a uniform gray region ($\rho$=0.5) [23]. We used a free/open-source implementation [41] of the globally convergent method of moving asymptotes (GCMMA) [38] optimization algorithm, restarting the algorithm (i.e., starting a new “epoch”) each time the binarization factor ($\beta$) changed values [23]. Three distinct binarization values were used throughout the optimization process: $\beta =8,16,32$. The linewidth and linespacing constraints [42] along with the minimum area and enclosed area constraints [30] were only applied during the last binarization epoch ($\beta$).
We ran each optimization on eight Intel Xeon Gold 6226 2.7 GHz CPU nodes (totalling 192 cores) using resources provided by the Partnership for an Advanced Computing Environment (PACE) at the Georgia Institute of Technology [13]. Each 3D single-polarization grating coupler Maxwell simulation took between 5 and 10 minutes to run (adjoint simulations typically require a longer runtime than the forward simulations due to the broadband adjoint sources [29]) and the optimization terminated after 600 iterations (1200 simulations). The first two epochs each ran for 70 iterations. Figure 1 describes the geometric and performance evolution of the single-polarization grating coupler and illustrates the final multilayer geometry and broadband performance.
Fig. 1. Geometric, multilayer design evolution at iterations 1, 10, 100, and 600 (a) and optimization evolution (b) for the single-polarization grating coupler (c). The poly-Si (gold) and SOI (blue) are jointly optimized as independent layers within the CMOS process. Fabrication constraints are applied to ensure minimum linewidth, linespacing, area, enclosed area, and curvature requirements are all met. The final high-resolution simulation (d) reveals a coupling efficiency of -3.0 dB. Throughout the minimax optimization, three distinct wavelength points (red) were used to evaluate the coupling efficiency (i.e., wavelength-dependent insertion loss) of the device. The 10 $\mu$m $\times$ 10 $\mu$m grating coupler routes a single linear polarization state of the fiber (LP$^{x}_{01}$) to the fundamental TE mode of a silicon waveguide 0.5 $\mu$m wide.
The optimization routine yielded a grating topology without any explicit mode-matching taper, such that the grating couples directly to/from the waveguide. Confocal grating lines are apparent, but non-intuitive protrusions appear along each line. One might assume these design perturbations apodize the grating periodicity, which ensures that the far-field pattern matches the desired Gaussian beam profile. Interestingly, many regions of the poly-Si layer sit above etched (void) SOI regions, a trend seen with many 2D freeform optimizations [17,18]. While this configuration does not violate any foundry design rules (the foundry assumes oxide can reliably fill such voids), the resulting conformal geometry poses some challenges from a design for manufacturability (DFM) perspective, as discussed in Sec. 4. Similarly, early stages of the optimization favors photonic-crystal-like structures exhibiting small “islands” and “holes”. The DRC optimization constraints, which are activated during the last optimization epoch, reshape the violating regions such that the final geometry passes DRC without compromising performance.
The dual-polarization grating coupler was designed using the same resources and optimization configuration as the single-polarization grating coupler. The optimization terminated after just 538 iterations, but each simulation required twice as much time to converge (10-20 minutes per simulation) due to the lack of simulation symmetry, as described earlier. The first epoch ran for 70 iterations, while the second epoch only ran for 50 iterations. Figure 2 illustrates the geometric and performance evolution of the dual-polarization grating coupler and illustrates the final multilayer geometry and operating state.
Fig. 2. Geometric, multilayer design evolution at iterations 1, 10, 100, and 538 (a) and optimization evolution (b) for the dual-polarization grating coupler (c). The poly-Si (gold) and SOI (blue) are jointly optimized as independent layers within the CMOS process. Fabrication constraints are applied to ensure minimum linewidth, linespacing, area, enclosed area, and curvature requirements for each layer are all met. The final high-resolution simulation (d) reveals a coupling efficiency of -3.0 dB. Throughout the minimax optimization, three distinct wavelength points (red) were used to evaluate the coupling efficiency (i.e., wavelength-dependent insertion loss) of the device. The 10 $\mu$m $\times$ 10 $\mu$m grating coupler routes one polarization state of the fiber (LP$^{x}_{01}$) to the fundamental TE mode of a silicon waveguide 0.5 $\mu$m wide, while routing the other polarization state (LP$^{y}_{01}$) to the fundamental TE mode of another waveguide.
The resulting dual-polarization grating coupler topology shares many similarities to its single-polarization variant. For example, apodized periodic grating lines are visible in the exterior regions of the grating coupler. The center of the coupler features a unique lattice-like structure that is typical of analytically designed dual-polarization couplers [43–45]. While traditional methods perform a geometric “outer product” using a single-polarization profile (yielding a “low rank” design), the TO approach produces fully apodized designs that maximize the overlap in the far field without breaking the prescribed symmetry. Unlike classic design approaches, which often require subwavelength features incompatible with commercial foundries, the final topology was DRC clean.
After both gratings were designed, they were simulated at higher resolutions (50 pixels/$\mu$m) to determine the final coupling efficiency, bandwidth, and steady state behavior. Figure 3 illustrates the simulated near- and far-field profiles for both grating coupler designs. The perfectly vertical emission profile is evident on both devices. While the fields directly above the grating coupler structure appear to have no identifiable form or structure, the field profiles at the location of the fiber facet (10 $\mu$m above the grating) indeed appear to match the Gaussian profile of the injected source (with some minor distortion seen in the dual-polarization grating coupler).
Fig. 3. Steady-state field profiles for a single-polarization (a) and dual-polarization (b) grating coupler at $\lambda$=1.55 $\mu$m. The cross-sectional profile of the fields is displayed for various heights of the emitter’s profile: Z=0 $\mu$m (in plane with the device) Z=1 $\mu$m (the emitter’s near field) and Z=10 $\mu$m (the designated “far field” of the emitter). Each emitter was specifically designed to match the fundamental mode of a single-mode fiber at the designated far-field plane (Z=10 $\mu$m). The emitters were designed to transmit at normal incidence ($0^{\circ }$ from the normal).
The spectral response of the high-resolution simulation yielded lower predicted coupling efficiencies (-3.0 dB for the single-polarization variant and -5.6 dB for the dual-polarization variant) than those from the standard optimization resolution (-1.2 dB and -3.0 dB respectively). This is somewhat expected due to the subwavelength (i.e., non-adiabatic) nature of the devices. These high-resolution simulations also predicted a center wavelength, $\lambda _0$=1542 nm and a 3-dB bandwidth of 73 nm for the single-polarization grating coupler and a center wavelength $\lambda =$1542 nm with a 3-dB bandwidth of 84 nm for the dual-polarization grating coupler. Interestingly, the center wavelength for both structures deviated from the designed center wavelength ($\lambda$=1550 nm), possibly due to the optimizer attempting to satisfy the many DRC requirements without compromising insertion loss. Future work should explore subpixel averaging techniques (and the corresponding adjoint formulation) to restore second-order accuracy and mitigate discretization effects [46]. To further improve the coupling efficiency of the device, one could also increase the aperture size itself, such that it overlaps the entire projected beam profile (at the expense of longer forward and adjoint simulations). Even with these additions, however, the fixed minimum feature sizes, layer thickness, and etch orientation place fundamental limits on the maximum achievable coupling efficiency. We determined that the current topologies, which satisfied the many DRC requirements of the foundry, were suitable for fabrication and validation of our methodology.
3. Experimental results
Both the single- and dual-polarization grating couplers were fabricated on the 300 mm silicon photonics GlobalFoundries 45CLO CMOS process [12,47]. We measured two samples from three separate wafers (totaling six device measurements for each grating coupler). Figure 4 depicts micrograph images of both fabricated grating couplers.
Fig. 4. Both designs were fabricated on three 300 mm silicon photonic wafers using the GF 45CLO MPW process (a). Multiple die from each wafer contain multiple samples of each devices (b). Two devices from each wafer were randomly tested. Optical micrographs of the single- and dual-polarization fabricated grating couplers (c).
We coupled light to and from the grating couplers using a standard single-mode fiber array (OZ Optics) with 127 $\mu$m pitch. In order to mitigate Fabry-Perot resonances due to the fiber-array-chip interface, we applied index-matching gel (ThorLabs) to the surface of the chip. We measured both input and output grating couplers simultaneously within $\pm$0.5 dB of repeatability using six-axis precision alignment stages (Thorlabs).
Ultra-broadband insertion-loss (IL) measurements for both grating couplers were performed using two laser sources: a Keysight 81682A which swept from 1460 nm to 1550 nm and a Keysight 81642A which swept from 1510 nm to 1640 nm. Each laser source fed into polarization paddles (ThorLabs) and then into the fiber array. We measured the optical power using logarithmic, high-dynamic range photodetectors (Koheron). We calibrated the response of each laser source and the photodetectors to ensure proper insertion-loss measurements at the correct polarization. The on-chip insertion-loss test structures consisted of two grating couplers and simple waveguide loopbacks connecting the input and outputs. The gratings’ return loss (RL) was subsequently extracted from the Fabry-Perot (FP) resonances of the insertion loss measurement [48] using
Figure 5 describes the insertion loss (IL) and return loss (RL) performance of the single-polarization grating coupler. The mean measured insertion loss was -4.7 dB, 1.7 dB less than the simulated result. We observed 0.89 dB of variation across all six measurements at the center wavelength. The measured center wavelength shifted +13 nm, from 1542 nm to 1555 nm. The mean measured return loss at the measured center wavelength was -13.7 dB and the resulting 3-dB bandwidth was 75 nm, 2 nm larger than the simulated result. While there are notable differences in the measured IL, RL, and center wavelengths, the single-polarization grating couplers still perform well for many practical applications, particularly those that require a small footprint and broad operating bandwidth. Furthermore, the relative consistency in performance from wafer to wafer is encouraging, and indicates that the measurement-simulation discrepancy may be due to a systematic perturbation, which is further discussed in Sec. 4.
Fig. 5. Experimental results describing the single-polarization grating coupler’s insertion loss (a) and return loss (b). Six structures were measured from three different wafers. The light-blue band depicts the worst- and best-case performance across all three wafers. The dark-blue line depicts the mean performance. The measured 3 dB bandwidth is 75 nm with an average peak coupling efficiency of -4.7 dB at 1570 nm. The measurements are compared with the corresponding simulation of the ideal design (red).
Similarly, Fig. 6 describes the insertion loss, return loss, polarization extinction (PE), and polarization-dependent loss (PDL) of the dual-polarization grating coupler. The mean measured insertion loss was -7.0 dB, which is 1.4 dB less than the simulated result. We observed 2.4 dB of variation across all six measurements at the center wavelength. The measured center wavelength shifted +28 nm, from 1542 nm to 1570 nm. The resulting 3-dB bandwidth was 89 nm. The mean polarization extinction was 38.4 dB at the center wavelength, with the mean ranging from 30.8 dB to 39.4 dB across the band. The resulting PDL, which was extracted from the singular values of the measured Jones matrix at each wavelength point [49], was 1.9 dB with 2.1 dB of variation at the center wavelength, and a range of 0.02 dB to 4.9 dB across the band.
Fig. 6. Experimental results describing the dual-polarization grating coupler’s insertion loss (a), return loss (b), polarization extinction (c) and polarization-dependent loss (d). The light-blue band depicts the worst- and best-case performance across all three wafers. The dark-blue line depicts the mean performance. The measured 3 dB bandwidth is 89 nm with a mean peak coupling efficiency of -7 dB at 1570 nm. The insertion loss, return loss, and polarization extinction measurements are compared with the corresponding simulation of the ideal design (red). An ideally symmetric PGC exhibits no polarization-dependent loss.
4. Discussion
In this section, we analyze discrepancies between the theoretical and experimental results for both grating couplers. We discuss various challenges and nuances to inverse-designed integrated photonics posed by commercial-foundry fabrication processes and how future work can better account for these effects. The most apparent differences between our measured and simulated results are the coupling efficiencies and center wavelength. For classic grating couplers, these characteristics are heavily influenced by both the measurement and the fabrication processes [14]. For example, coupling into the grating at different angles will impact the resulting center wavelength and peak coupling efficiency. Similarly, relative changes to layer thicknesses will also shift the grating’s center wavelength and peak coupling efficiency.
To rule out measurement variability as the source of the discrepancy, we performed rigorous experiments that ensure the repeatability of the results. Using a precise (sub-micron) translation stage and goniometer, measurements were taken with multiple fiber arrays and produced results (for identical devices) within 0.5 dB, which is within the specified tolerance of the OVA 5100 used to characterize the devices. As such, we confidently associate the discrepancy between simulated and measured results to manufacturing constraints not yet captured.
Characterizing potential sources of fabrication realities from a commercial foundry process is difficult, as many of the final physical features are not conducive to nano-scale imaging or profilometry, and would require metrology details from the foundry itself. Nonetheless, our measured results yield important insights into the physical structure of each grating coupler. The relative coupling efficiency from device to device across multiple wafers exhibits low variation (Sec. 3), indicating any shift in performance is indicative of a systematic perturbation from the ideal case consistent across each wafer. Such sources include different layer thicknesses, conformal layering, different refractive index models, or even additional layers themselves (e.g., a passivation layer) not disclosed in the original design kit.
We note that conformal layering of the poly-Si over the SOI poses several fabrication challenges that are difficult to predict or model. Ideally, and as modeled in simulation, the entire poly-Si pattern would lie along the same plane across the entire wafer. This is difficult to achieve in practice, however, especially when poly-Si material sits above regions where the SOI has been etched away. The gate-oxide thin film, which occupies the region between the SOI and poly-Si layers, is often grown uniformly across the wafer. While some foundry-process steps are implemented to ensure a quasi-level surface before depositing the poly-Si gate layer, a non-uniform, conformal layering is likely, especially with geometries as complex as the grating couplers demonstrated in this work. We surmise that this is the primary cause of the center wavelength shift.
In summary, we confirm that the foundry process parameters (such as layer thickness) are consistent from wafer to wafer, and that the resulting grating couplers exhibit minimal sensitivity to random fabrication variability. Despite the challenges introduced by the conformal layering or other sources of systematic variance, the resulting structures perform well, and future designs could incorporate this conformal layering into the optimization process itself if a particular device shows excessive sensitivity to this effect. Alternatively, fabrication constraints that prohibit poly-Si deposition above void regions where the SOI is to be removed would prevent any conformal layering at the expense of maximum-achievable coupling efficiency due to the reduced design space. We hope to further account for the complexities of the BEOL stack, which include many different oxide and nitride thin films, each with different refractive indices. The near-to-far transformation described in Sec. 2. is extendable to other Green’s functions that account for propagation through these inhomogeneous regions [50] without requiring any increase in the computational cell size. Finally, careful design practices, like placing bondpads sufficiently far away from the grating couplers, will mitigate the effects of fiber array misalignment.
5. Conclusion
We experimentally demonstrated a novel, large-scale design paradigm for full-aperture grating couplers on a commercial foundry platform. Our devices were designed using two foundry layers, each with distinct foundry fabrication requirements. Unlike traditional grating design methodologies that start with 2D cross sections, our approach designs the entire grating structure in 3D and offers significantly more degrees of freedom (as needed by the dual-polarization grating coupler). Importantly, our gratings were explicitly designed for the GlobalFoundries 45CLO commercial foundry process, which places a myriad of constraints on the final design’s minimum linewidth, linespacing, curvature, area, and enclosed area. These constraints effectively limit the maximal achievable performance of the devices. Despite these limitations, however, the final devices exhibit competitive insertion loss, bandwidth, and polarization-extinction performance metrics. Perhaps even more significant, the final devices demonstrate minimal variability across multiple samples spanning three separate wafers.
As such, we are confident that our methodology is capable of producing high-quality grating couplers on foundry platforms with lower insertion loss than demonstrated here. For example, by continuing to scale the grating aperture to a much larger size (such that it more fully spans the incoming fiber’s optical mode) the maximal attainable efficiency will also continue to improve. Indeed, the flexibility offered by our approach opens the door toward designing on-chip IO for a myriad of previously unexplored applications.
Appendix A: Device parameterization and optimization constraints
The device parameterization follows that of traditional density-based topology optimization described in Ref. [23] and Ref. [30]. First, the “latent” design parameters ($\mathbf {\rho }$), which describe a 2D “image” for each lithography plane (Si and poly-Si) are convolved with a 2D conic filter, $w$, such that
After filtering, the device parameters are subsequently projected onto a quasi-binary design field using
The minimum linewidth constraint, $g_{LW} \le 0$, and minimum linespacing constraint, $g_{LS} \le 0$, require an erosion threshold parameter, $\eta _e$, a dilated threshold parameter $\eta _d$, and the indicator function decay parameter, $c$ and are defined by [30,42]
For the Si layer, $R=200$ nm (12 pixels), $\eta _e=0.75$, $\eta _d=0.36$, and $c=20736$. For the poly-Si layer, $R=100$ nm (6 pixels), $\eta _e=0.75$, $\eta _d=0.25$, and $c=1296$. The parameter $c$ was chosen such that $c=R^{4}$ (where $R$ is in units of pixels). We note that the linewidth and linespacing constraint functions also implicitly enforce a minimum curvature constraint equal to that of the filter radius, $R$. In addition, these constraints force the final design to be binary.
The minimum-area constraint, $g_A \le 0$, and minimum-enclosed-area constraint, $g_{EA} \le 0$, use the approach described in Ref. [30], where an indicator function identifies regions of the binary geometry where the corresponding “islands” or “holes” are too small. We used a standard marching-squares algorithm [51] to identify these regions. The differentiable constraint functions then use these results to ensure the optimizer removes violating regions, and are defined by
Funding
National Defense Science and Engineering Graduate; National Science Foundation (2052808); Georgia Electronic Design Center.
Acknowledgments
The authors would like to thank Steven G. Johnson, Ardavan Oskooi, Yusheng Bian, Michal Rakowski, and Roderick A. Augur for useful discussions. The authors would also like to thank GlobalFoundries for providing silicon fabrication through the 45CLO university program. This research was supported in part through research cyberinfrastructure resources and services provided by the Partnership for an Advanced Computing Environment (PACE) at the Georgia Institute of Technology, Atlanta, Georgia, USA. This material is based upon work supported in part by the National Science Foundation (NSF) Center “EPICA” under Grant No. 2052808, https://epica.research.gatech.edu/.
Disclosures
The authors declare no conflicts of interest.
Data availability
Data underlying the results presented in this paper are not publicly available at this time but may be obtained from the authors upon reasonable request.
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