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Gate-controlled silicon controlled rectifier with adjustable clamping voltage using a photoelectric mechanism

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Abstract

In order to flexibly control the voltage-clamping capability of silicon controlled rectifiers (SCRs), this paper proposes a photoelectric gate-controlled SCR (PGCSCR). Equivalent circuits and technology computer aided design (TCAD) simulations are used to analyze how the device works. The device has been validated by a standard 0.18 µm Bipolar CMOS DMOS (BCD) process. The ES620-50 Transmission Line Pulse (TLP) test system was used to verify the impact of the photoelectric effect on the electro-static discharge (ESD) characteristics of the device. The test result shows that the clamping voltage at the holding point of the PGCSCR under the light-free condition is 4.308 V. When the optical power is 5 W/µm2 and the 450 nm wavelength spot is irradiated on the surface of the device, the clamping voltage at the holding point of the PGCSCR is reduced to 3.655 V. And by changing the wavelength of the incident light spot (600 nm), the clamping voltage (3.409 V) of the device changes. Finally, based on the avalanche multiplication effect and the photoelectric effect, the change in the clamping voltage of the device can be further explained. PGCSCR can flexibly adjust the clamping voltage of the device according to the ESD window requirements of the target chip without changing the structure and size, and is expected to be applied in the fields of integrated optical circuits, opto-coupling, and optical communication.

© 2022 Optica Publishing Group under the terms of the Optica Open Access Publishing Agreement

1. Introduction

With the continuous development of integrated circuits and integrated optical circuits, the importance of optical control technology in this field has become increasingly prominent [13]. The injection of photon signals is often accompanied by the excitation of electrons, and the precise control and coupling of optoelectronics is a very challenging cutting-edge technology [46]. For example, in the research of integrated storage and computing architecture and neurocomputing, the proposal of optical-controlled memristor provides new inspiration for breaking the von Neumann architecture. Jing-Yu Mao et al. discussed the development of optical-controlled memristive technology, emphasizing that optical processing methods can achieve extremely high bandwidth and speed, enabling the system to have the advantages of low power consumption and multi-level data storage. In addition, the modulation mechanism based on optical control is expected to further promote the application of biomimetic artificial synapses [7]. In order to realize the all-optical controlled single resonance in nanobeam cavity, Tao Guo et al. carried out the research of thermo-optical effect combined with silicon-based graphene. Benefiting from the high thermal conductivity of the material itself, the all-optical control in the system has a tuning efficiency of 0.0346 nm/mW and a switching power of 47 mW. The above research provides a design idea for realizing efficient on-chip all-optical controlled single resonance [8]. Optical control technology is widely used, especially in the field of all-optical switches. Based on the refractive index enhancement mechanism in atomic systems, Rakesh Dhama et al. applied it to all-optical switching. Since the atomic system is affected by coherence and quantum interference, it exhibits higher susceptibilities. This method employs coherently controlled absorption to modulate the amplitude of the incident signal, providing a potential structure for linear all-optical switching devices that can be used to improve the performance of optical-controlled switches [9]. The above researches have achieved applications in many fields using optical control technology [10,11], and the development of this technology is also promoting the interconnection of integrated circuits and optical circuits. Chips implemented by optoelectronic coupling contain a large number of complex components, and due to the diversification of application environments, the reliability of circuits and optical circuits is threatened, and most device failures are attributed to electrostatic shock effects. Therefore, it is also very necessary to carry out the reliability research of the chip.

The electrostatic protection parameters of the chip strictly limit the design of ESD devices, and the flexible regulation of related parameters is the most important problem in device design. Most chip guards use SCRs as basic components, which discharge ESD pulse currents based on similar latch-up effect [1216]. However, when the device is fabricated, the clamping voltage has been determined and it is only related to the structure, manufacturing process and external electrical conditions. In order to explore a method to flexibly adjust the clamping voltage, fully referring to the control mechanism of integrated photonics, based on the optical control technology and the gate-controlled effect [17], a SCR with adjustable clamping voltage was proposed. The photons injected from the outside will change the carrier concentration of the SCR device. The device generates multiplied photo-generated carriers at the moment of avalanche breakdown, thereby reducing the on-resistance and promoting the positive feedback effect of the SCR. Thus, the transient voltage is clamped to a lower level and the breakdown probability of the device gate oxide layer can be effectively reduced. The clamping voltage at the holding point of the PGCSCR under light conditions has a significant change compared to that under light-free conditions.

2. Design and simulation of PGCSCR device

Since chip Input/Output (I/O) ports require efficient ESD protection, electrostatic devices with different structures can be selected to meet the diverse ESD window requirements. In this paper, the cross-section and the basic principle of PGCSCR are shown in Fig. 1. The reverse-biased P-type semiconductor/N-type semiconductor (PN) junction consisting of P-type-Well (P-Well) and N-type-Well (N-Well) acts as the trigger surface of the PGCSCR and is used to determine the trigger voltage of the device. When the forward ESD pulse comes to the anode of the device, the SCR path consists of anode P+, anode P-Well, Deep N-type-Well (DN-Well), cathode P-Well and cathode N + . The gate of the anode generates a vertical downward electric field force relative to DN-Well, and the gate of the cathode generates a vertical upward electric force relative to DN-Well. The direction of the electric field force is always consistent with the current discharging direction, thereby effectively promoting carrier release and improving the ESD characteristics of the device [18].

 figure: Fig. 1.

Fig. 1. The cross-section and the photomultiplier principle of PGCSCR.

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The difference between PGCSCR and traditional ESD devices is that the device draws on the detection principle of avalanche diode. The reverse-biased PN junction of P-Well and N-Well inside the PGCSCR device is selected to receive the optical signal. When an ESD event occurs, the trigger surface of the PGCSCR produces an avalanche multiplication effect. At this time, the electrons in the valence band absorb the energy of the photon, produce energy level transitions, and form photo-generated electron-hole pairs. Under the effect of the avalanche multiplication, the number of photo-generated electron-hole pairs increases sharply. And the unbalanced carriers generated by the light injection participate in the process of electrostatic discharge of the device. When the device is fully turned on, the avalanche effect is difficult to maintain due to the deep snapback characteristics of the SCR, thus the photoelectric effect can only affect the snapback process of the device. After avalanche quenching, there are very few carriers generated by light injection so that its effect on ESD characteristics is negligible. The photogenerated carriers generated based on the avalanche multiplication effect can effectively promote the formation of the positive feedback loop of the SCR and reduce the on-resistance. As a result, the PGCSCR can obtain a lower transient clamping voltage before entering the linear increase region, which reduces the probability of the device being broken down by the electrostatic pulse when the device is turned on. In addition, PGCSCR can further affect the concentration of photogenerated carriers by absorbing photon signals of different wavelengths, and achieve the purpose of flexibly adjusting the clamping voltage at the holding point of the device. The equivalent circuit of PGCSCR is shown in Fig. 2.

 figure: Fig. 2.

Fig. 2. (a) The equivalent circuit of traditional SCR. (b) The equivalent circuit of PGCSCR.

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Silvaco's Atlas is used to simulate the electrical characteristics of PGCSCR. Figure 3(a) and Fig. 3(b) show the impact ionization distribution and light absorption rate of the device respectively. It can be seen that the avalanche multiplication effect of the device occurs in the reverse-biased PN junction of the trigger surface, and the position of the light injection coincides with the trigger surface. Figure 4(a) and Fig. 4(b) shows the initial current path of the PGCSCR device under light-free and light conditions respectively. The 450 nm light signal with an incident angle of 90 degrees is applied to the trigger surface. Since the PN junction of the trigger surface is close to the surface of the device, it is sensitive to the illumination with 450 nm wavelength, ensuring high photoelectric conversion efficiency of the PGCSCR device. Figure 4(c) and Fig. 4(d) shows the current path after the PGCSCR device is fully turned on under light-free and light conditions respectively. It can be clearly seen that the SCR path of the device is fully formed and the current density of the device under light conditions is much higher than the current density under light-free conditions.

 figure: Fig. 3.

Fig. 3. (a) Impact ionization distribution of PGCSCR. (b) Light generation rate distribution of PGCSCR.

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 figure: Fig. 4.

Fig. 4. (a) Initial current path of the PGCSCR under light-free conditions. (b) Initial current path of the PGCSCR under light conditions. (c) Complete current path for PGCSCR under light-free conditions. (d) Complete current path for PGCSCR under light conditions.

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3. Experiment results and discussion

The PGCSCR is implemented on the commercial standard DB HiTek 0.18 µm BCD process. The schematic diagram of the fabrication process of the device is shown in Fig. 5(a) to Fig. 5(d). The layout and microscope image are shown in Fig. 6(a) and Fig. 6(b) respectively. The finger length of the device is 50 µm (8 fingers), and its ESD characteristics are verified by the ES620-50 TLP test system. The device test is divided into three groups, the first group tests the I-V characteristics of the PGCSCR under light-free conditions. The second group and the third group irradiate a vertical light source with a wavelength of 450 nm and 600 nm respectively on the surface of the device. And the spot position covers the photosensitive area of the PGCSCR to further test the changes in the ESD characteristics of the device (The instrument used in the optical test is the QE-IPCE-K6517B photoelectric response system, and the light source is a xenon lamp point light source. The wavelengths cover 300 nm to 1100 nm, the light source resolution is 0.1 nm, the spot area is 1 mm2, and the optical power is 5 W/µm2. The two sets of light wavelengths selected for the experiment are 450 nm and 600 nm respectively).

 figure: Fig. 5.

Fig. 5. (a) Formation of Shallow Trench Isolation (STI). (b) Ion implantation to form well regions. (c) Ion implantation to form heavily doped regions. (d) Realize metal interconnection, remove dummy to promote photon incidence.

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 figure: Fig. 6.

Fig. 6. (a) The layout of PGCSCR. (b)The microscope image of PGCSCR.

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Figure 7 shows the clamping voltage curves at the holding points of the device under three experimental conditions. Under light-free conditions, the transient clamping voltage of PGCSCR is 4.308 V. When the wavelength of the incident light source is 450 nm, the transient clamping voltage of the device is significantly reduced (3.655 V). When the wavelength of the incident light source is 600 nm, the clamping voltage of the device is further reduced (3.409 V) compared to the above two experimental results. The test results show that PGCSCR has good clamping characteristics, and the clamping voltage changes with the wavelength of the incident light source.

 figure: Fig. 7.

Fig. 7. Transient voltage clamping curve of the holding point of PGCSCR under three different experimental conditions.

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The I-V curves under the three experimental conditions of PGCSCR are shown in Fig. 8. Due to the existence of photo-generated carriers, the on-resistance of the SCR is reduced, which significantly affects the snapback characteristics of the device. However, while reducing the on-resistance of the device and promoting the positive feedback effect, the photogenerated carriers will further increase the leakage current of the PGCSCR. Under light-free conditions, the leakage current of PGCSCR remains at 10−8 A. Under light conditions, the leakage current of the device increases by one order of magnitude (10−7 A). Therefore, while using photons to improve the ESD characteristics of PGCSCR, it is also necessary to further consider the impact of leakage current on the core chip.

 figure: Fig. 8.

Fig. 8. Transmission line pulse test curve of PGCSCR.

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4. Conclusion

In this paper, the 0.18 µm standard BCD process is used to realize the PGCSCR with photoelectric effect. Combining photoelectric theory with two-dimensional device simulation, the working principle of PGCSCR is analyzed. And the reason why the photoelectric effect affects the ESD characteristics of the device is found. By comparing the test results of the three light source conditions, it is verified that the photoelectric effect can change the clamping voltage of PGCSCR. However, how to significantly improve the ESD characteristics of the device while maintaining a low leakage current requires further research and exploration. In summary, the PGCSCR can change the electrostatic characteristics of the device through photoelectric effect, providing reference ideas for the design of SCRs with flexibly-controlled ESD windows.

Funding

Innovation Project of Science and Technology Department of Hunan Province (2019GK4016, 2020GK2018); Hunan Science and Technology Department Huxiang High-level Talent Gathering Project (2019RS1037); National Natural Science Foundation of China (61827812, 62174052).

Disclosures

Yang Wang, Yujie Liu, Zeyu Zhong, Xiangliang Jin, Yan Peng, Jun Luo and Jun Yang declare that they have no conflict of interest.

Data availability

Data underlying the results presented in this paper are not publicly available at this time but may be obtained from the authors upon reasonable request.

References

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Data availability

Data underlying the results presented in this paper are not publicly available at this time but may be obtained from the authors upon reasonable request.

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Figures (8)

Fig. 1.
Fig. 1. The cross-section and the photomultiplier principle of PGCSCR.
Fig. 2.
Fig. 2. (a) The equivalent circuit of traditional SCR. (b) The equivalent circuit of PGCSCR.
Fig. 3.
Fig. 3. (a) Impact ionization distribution of PGCSCR. (b) Light generation rate distribution of PGCSCR.
Fig. 4.
Fig. 4. (a) Initial current path of the PGCSCR under light-free conditions. (b) Initial current path of the PGCSCR under light conditions. (c) Complete current path for PGCSCR under light-free conditions. (d) Complete current path for PGCSCR under light conditions.
Fig. 5.
Fig. 5. (a) Formation of Shallow Trench Isolation (STI). (b) Ion implantation to form well regions. (c) Ion implantation to form heavily doped regions. (d) Realize metal interconnection, remove dummy to promote photon incidence.
Fig. 6.
Fig. 6. (a) The layout of PGCSCR. (b)The microscope image of PGCSCR.
Fig. 7.
Fig. 7. Transient voltage clamping curve of the holding point of PGCSCR under three different experimental conditions.
Fig. 8.
Fig. 8. Transmission line pulse test curve of PGCSCR.
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