1. Introduction

Future all-optical networks will require optical data packets to be routed quickly through all-optical nodes. For transparent and high-throughput packet routing, the packet header/label bits must be all-optically recognized and further the packet routed/switched properly [1–2]. So far, most of proposed architectures address processing the packet header electronically [3] and/or take the routing/switching decisions employing electronic control circuitry [4–7]. Furthermore, the really all-optical schemes previously reported are limited to single-bit header reading and/or 1×2 optical packet switching [1,8–9], which cannot be generally considered as packet routing.

In this paper, a new scheme for fully all-optical label reading and packet routing based on all-optical logic XOR gates and all-optical flip-flops is proposed. This architecture is key to develop all-optical packet routers in optical label-swapping networks [10]. Conversely to other header/label recognition methods [1,9], the approach proposed here allows for the recognition of arbitrary words without the need of any kind of ‘keyword’ coding. The basic building blocks of the proposed architecture are potentially integrated semiconductor-optical-amplifier-based Mach-Zehnder interferometers (SOA-MZIs).

The proposed packet routing scheme was validated by means of simulations with 10 Gbit/s packets. The label/header of each data packet was previously processed employing logic XOR gates and the packet routed according to it. Four different wavelengths used to route the data packets were generated during the simulations employing optical flip-flops. The simulation results show that a good performance (less than 0.45 dB penalty) for 10 Gbit/s packet processing can be achieved.

2. Principle of operation

The proposed architecture is shown in Fig. 1. When a packet arrives to the optical node, its header/label is extracted and sent to an array of optical correlators (Fig. 1(a)) where it is compared with several reference address keywords (look-up table entries) by using all-optical logic XOR gates based on single SOA-MZI devices (Fig. 1(b)) [11–13]. The reference address keywords can be all-optically generated employing the approach shown in [9]. By using this technique, the address keywords are automatically generated after each packet arrival without the need of any additional synchronization. Anyway, it is not the aim of this paper to deal with the synchronization issues in optical nodes which is a tricky matter. Each XOR gate is followed by an all-optical flip-flop which emits a CW signal at λ_i when it is in ″high″ state, as it is shown in Fig. 1(a). Previously to the comparison, an optical pulse (set signal) is applied to all optical flip-flops to set their outputs to ″high″ state (Fig. 1(b)). If both data inputs to a specific correlator (XOR gate) are identical, no output pulse is obtained and the following flip-flop continues emitting at λ_i. Conversely, if any of the bits of both data inputs is different, one or several pulses may be obtained at the output of the XOR gate (Fig. 1(b)). These pulses reset the corresponding all-optical flip-flops and no signals appear at their outputs. The structure of the all-optical flip-flop based on a single SOA-MZI device (Fig. 1(b)) has been proposed and evaluated, for the first time [14]. Similar architectures make use of a minimum of two SOA-MZIs [15].

 

Fig. 1. (a) All-optical packet router architecture and (b) detailed diagrams of some of the simulated elements and their interconnection.

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The operating principle of the proposed all-optical flip-flop shown in Fig. 1b is described below. A CW optical signal at λ_i is launched into the input port of the SOA-MZI. The input and output couplers provide both a phase shift of π/2 between both MZI branches. Therefore, in absence of other input signals no optical signal is obtained at the SOA-MZI output as a consequence of a destructive interference at the output coupler. As it is shown in Fig. 1(b), this output port is interconnected through a feedback loop to the lower SOA-MZI branch by means of an 80/20 coupler. Inside this feedback loop, a 2×2 coupler with an adjustable coupling factor is also used to extract the output signal from the all-optical flip-flop and introduce the set pulses which act as enabling signals. Finally, another 80/20 coupler is used in the upper SOA-MZI branch to balance the interferometer and allow the introduction of the reset pulses which act as disabling signals. When a set pulse is injected (Fig. 1(b)), it reaches the lower SOA and reduces its carrier density and differential gain. The SOA-MZI is now unbalanced and the CW signal experiences different gains in both MZI branches, which results in an output power in point (D). The feedback loop forwards a fraction of this output power through the couplers again to the lower SOA to hold its state when the optical power of the set pulse vanishes. Conversely, when a reset pulse is injected, it arrives to the upper SOA and reduces its carrier density and gain in a similar way, but due to the feedback loop the carrier density in the lower SOA is also changed. If the energy of this reset pulse is high enough a change in the state of the flip-flop occurs, and the MZI is balanced again. By employing this flip-flop, low switching energies (<2 pJ pulses) and fast operation (<1 ns response delays) may be achieved.

In optical label swapping networks, the packet header usually acts as a serial intensity-modulated optical label [10]. A new-label insertion circuit is also needed to restore the previously extracted incoming label by a new one, as shown in Fig. 1(a). Finally, all the optical flip-flop outputs are then combined and applied to an SOA-MZI wavelength converter (Fig. 1(a)) [16], jointly with the optical packet to be routed (the payload previously extracted and the new label inserted). Each packet is then converted to λ_i, the optical wavelength corresponding to the output of the unique flip-flop in ″high state″ (i.e., the correlator branch where both the corresponding packet label and the reference address are equal). The wavelength conversion of the payload allows for the packet routing by using an arrayed waveguide grating or similar techniques (Fig. 1(a)) [1].

As it can be deduced from the architecture shown in Fig. 1(a), only a limited address space is available due to the scalability driven by space constraints, integration issues and the loss in the splitters/combiners which need to be used to compare the incoming packet header/label with all the possible addresses. However, this approach may be still valid for all-optical label processing considering the typical number of optical nodes (different labels/addresses) in a core network which can be estimated in a maximum of 256 [17].

3. Simulation results and discussion

In order to validate the proposed scheme, simulations of the architecture of Fig. 1 for the specific case of 1×4 packet routing/switching were carried out using the Virtual Photonics Inc. software. For the simulations, we assumed the parameters shown in Table 1, and the label/payload separation and new-label generation and insertion circuits were assumed ideal, as they are not the aim of this paper. Some techniques for the implementation of these circuits are reported in [18–19]. The simulation results are shown in Fig. 2. Four 10 Gbit/s data packets (30 ps FWHM gaussian RZ pulses with 0.16 pJ energy at 1553.6 nm) with different optical labels were generated (Fig. 2(a)). The optical signal-to-noise ratio of the packets was 25 dB. The number of bits in the label was 4 whereas the payload had a 128-bit length. The labels of the packets were selected to match each one of the four reference address keywords. Therefore, for each optical packet reset pulses are obtained at the output of each correlator where there is no matching between the compared data words (this happens for all the branches but one in Fig. 1(a) during the time duration of each packet). For example, the second packet label matches the fourth reference address, therefore at the fourth XOR output there will be no reset pulses for the second packet as it is shown in Fig. 2(b). An stable CW signal (see Table 2) is generated for the whole duration of the packet at the output of the only flip-flop where no reset pulses enter (address matching branch). Following the previous example, this can be seen in Fig. 2(c). This optical signal was used later to do the wavelength conversion of the packet and further routing by the AWG. The optical packets routed to each output port are shown in Fig. 2(d)–(g). As it can be seen, the first packet is wavelength-converted to λ₂ (Fig. 2(e)), the second one to λ₄ (Fig. 2(g)), the third one to λ₁ (Fig. 2(d)) and the fourth one to λ₃ (Fig. 2(f)). The optical spectra of each packet are also shown in Fig. 2(d)–(g) as insets.

 

Fig. 2. Simulation results of all-optical packet routing (the points are referred to Fig. 1). (a) Input data packets at point (A). (b) Outputs from the 4th XOR correlator at point (C) (only the second label matches the 4th reference address). (c) Output from the 4th flip-flop at point (D). (d) AWG output port #1 at point (H). (e) AWG output port #2 at point (H). (f) AWG output port #3 at point (H). (g) AWG output port #4 at point (H).

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Table 1. Simulation parameters.

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Table 2. Optical flip-flop outputs.

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Fig. 3. BER performance of wavelength-converted and routed packets.

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During the simulations, a pump signal at 1558.44 nm was also applied to both the XOR correlator and the wavelength converter to accelerate the SOAs carrier density response [20]. For 40 Gbit/s operation, a differential phase-modulation scheme should be used at the SOA-MZIs [21]. Two 1.6-nm optical passband filters were also used between the SOA-MZIs, although not shown in Fig. 1(b). The performance of the wavelength conversion process depends on the quality of the signal at the output of the flip-flops. The optical powers at each flip-flop output are shown in Table 2. There are small variations due to the flip-flop parameters were the same for all of them. Each flip-flop, however, can be optimized independently to obtain the same output powers. Finally, the BER of the routed packets was estimated by means of simulations. In Fig. 3, the BER results show that less than 0.45 dB penalty is obtained for all the packets after wavelength conversion. The eye diagram can be also seen in Fig. 3 as an inset. The polarization issues were neglected during the simulations, as we considered that all the signals have the optimum polarisation states. An additional power penalty would arise if the polarization controllers are not adjusted correctly during the experiments, especially in the case of the SOA-MZI input signals.

4. Conclusion

A novel architecture for all-optical label reading and packet routing was proposed. The simulation results show less than 0.45 dB power penalty for the 10 Gbit/s wavelength-converted and routed data packets. This architecture has strong application in optical label swapping networks and can be extended to higher speeds by using a differential scheme in the SOA-MZIs.