1. Introduction

Silicon photonics is a promising platform for satisfying the demand of the intimate inter/intra-chip interconnections for its superior reach, bandwidth density, energy efficiency and low cost. The field has recently witnessed tremendous progress in silicon photonic technologies, including various high performance devices [1–3] and high speed optical links [4–6]. The adoption of wavelength-division multiplexing (WDM) has allowed the transmission of multiple channels per waveguide, achieving ultrahigh bandwidth density. WDM links require laser sources with controlled wavelength registration. Equally important is, high waveguide-coupled wall-plug-efficiency (wcWPE) to satisfy typical link power budgets. Recently-demonstrated silicon-assisted WDM sources have shown good wcWPE for non-tunable, multimode applications [7]. However, these are not suitable for wafer-scale platforms based on resonant optical modulators [8]. Efficient single-mode, tunable WDM light sources, heterogeneously integrated with a CMOS silicon platform, are critical for Tb/s and beyond, large scale, photonic interconnects, capable of achieving link energy efficiency of better than 1 pJ/bit [9].

Silicon is not a suitable material for light emission, due to its indirect bandgap structure and substantial free-carrier absorption. Integrating more efficient gain medium like III/V materials is a more practical approach. However, large lattice mismatch and crystal symmetry difference between silicon and III/V semiconductors makes direct epitaxial growth of III/V semiconductors on silicon difficult. Wafer bonding and edge-coupling are two main alternatives for hybrid integration of III/V active materials with silicon chip. However, they have their own limitations. Wafer bonding using hydrophobic or hydrophilic bonding is limited by the low carrier injection efficiency and thermal impedance mismatch [10–12]. Edge-to-edge butt-coupling has limited scalability due to its one-dimensional implementation [7,13–15]. In addition, none of the integration demonstrations mentioned above were accomplished in a SOI CMOS platform which is critical to achieve low unit cost. Hybrid integration approach based on surface-normal coupling of III/V gain medium with efficient wavelength control silicon photonic circuits is a promising solution for efficient WDM sources. Surface normal coupling approach has the advantages of scalability and low cost through two dimensional integration at the wafer level. However, coupling losses must be overcome to make efficient lasers.

WDM laser sources require tuning to the predefined wavelength grid with good wavelength stability. Thermal-electrical coolers (TECs) are typically used for stable operation of conventional WDM laser sources. Because of the relatively low efficiency of the TECs, the wall-plug efficiency (WPE) of these WDM lasers is typically limited to <1% [12]. Hence, such TECs should be eliminated for high WPE WDM laser sources. With the active medium running uncooled, other means of laser wavelength tuning and control with low power are necessary for silicon photonic WDM lasers.

In this paper, we report a proof-of-concept high-efficiency tunable laser source using a proximity vertical-coupling integration method to couple the gain medium with a silicon circuit on a CMOS silicon on insulator (SOI) platform. The silicon chip with ring resonator based tunable wavelength selective components and the III/V gain chip were fabricated independently using the well-established technologies. This vertical integration approach reduces the fabrication complexity and cost. Furthermore, it enables optimization of both silicon chip and gain chip independently for their own best performances, which could lead to a hybrid laser with high WPE, high tuning efficiency and accurate wavelength control. This approach could also be scaled up to a two-dimensional laser array for WDM applications by integrating multiple gain chips onto a silicon chip with a 2D coupler array. Wavelength tuning of the demonstrated hybrid laser source is achieved using a micro-heater integrated to the silicon rings. A substrate removal technique enabled a ten-fold enhancement in tuning efficiency. Devices were fabricated using a Freescale 130 nm CMOS SOI platform.

2. Device description

Figure 1 shows a schematic diagram of the vertical-coupled hybrid laser. The top reflective semiconductor optical amplifier (RSOA) is an off-the-shelf InP based gain chip with a high reflectivity (90%) mirror on the top side (straight angle), a low reflectivity (< 10⁻⁴) facet on the bottom side (angled waveguide). The RSOA chip is mounted on a silicon carrier with electrode pads to supply pump current through wire bonding. One corner of the RSOA chip is polished away to improve the coupling efficiency by reducing the gap between the facet of the III-V waveguide and the grating coupler on the bottom silicon chip. A silicon ring resonator with an integrated micro-heater acts as a tunable wavelength selective reflector. A directional coupler is used to extract power from the cavity to the output ports. Additional design details for the optical circuit can be found in [9].

 

Fig. 1 Schematic diagram of the vertical coupled hybrid Silicon laser. Inset: Integration of RSOA and Silicon chip

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Silicon devices were fabricated using a 130 nm commercial CMOS process on a SOI wafer with a 300 nm top silicon layer and a 0.8 µm buried oxide layer. More specifically, the devices were built on Freescale 130nm CMOS SOI process node that consists of six metal layers of Cu intertwined with interlayer dielectrics, mainly composed of silicon nitride (SiN_x) and silicon dioxide (SiO₂). A silicon ring with 420 nm wide waveguide couples to the 390 nm wide bus waveguide via a 150 nm wide coupling gap. The ring radius is 5 µm (corresponds to a free spectral range of 20 nm) and the quality factor is 770. In the experiment, the directional coupler with a cross coupling ratio of 50% was designed to extract power from the cavity to the output waveguides.

A silicon-resistor based micro-heater is integrated directly on the ring waveguide for tuning the lasing wavelength with low power. A backside etched pit underneath the ring is introduced to improve the thermal tuning efficiency. More details about the design and fabrication process of the etch-pit can be found in [1]. A specially designed grating coupler is used to couple silicon chip with the gain chip vertically. The grating coupler has a chirped design with an output mode field diameter (MFD) of 4 µm. Our FDTD simulation shows that a coupling loss of 3.3 dB can be achieved when coupling with a Gaussian mode with a MFD of 2 µm, which is close to that of the RSOA chip used in the demonstration. Backside metal mirrors are introduced to improve the coupling coefficient by etching backside pits underneath the grating couplers followed by gold deposition [16]. Unlike edge-coupled approaches [7,13–15], the proposed technique does not rely on the edge of the chip and, therefore, can be scaled up to a high density 2D array.

The gain chip is actively aligned with the grating coupler using a six-axis high resolution micromanipulator while monitoring the optical power from the output ports. As a proof-of-concept demonstration, the gain chip was not fixed onto the silicon chip in the demonstration. The bonding procedure to integrate the gain chip permanently with the silicon chip is still under development and will be reported separately. The output power is measured from optical fibers coupled with the grating couplers designed with a MFD of 10 µm. The coupling loss between the fiber and silicon waveguide is measured to be 3.3 dB using a loop back waveguide shown as the dotted line in Fig. 1.

3. Laser characterizations

We first measured the L-I-V curves of the hybrid laser as shown in Fig. 2(a). The IV curve confirms a low serial resistance of 2 Ω, which is critical to high WPE. The packaging process does not increase the serial resistance due to independent fabrication process of the gain chip. The threshold current was 42 mA. The threshold current and WPE of the laser can be further improved by reducing the coupling loss between the RSOA and the SOI chip. Current coupling loss is estimated to be around 4 dB, where the MFD of the RSOA is around 2 µm while the MFD of the laser grating coupler is 4 µm. A total output power larger than 10 mW has been confirmed from all four silicon waveguide ports as depicted in Fig. 1. The output power is 7.5 mW counting only the sum of port 3 and port 4 nominally designated as output ports. Here, the coupling loss between the fibers and output grating couplers has been calibrated out. The kinks on the measured L-I curve are most likely due to mode hopping as there is no phase tuner implemented to compensate the current injection-induced gain medium index change.

 

Fig. 2 (a) L-I-V curves measured, (b) Wall plug efficiency as a function of the pumping current.

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We then calculate the wcWPE at different pumping powers by wcWPE = P_optical/I·V, where the P_optical is the optical output power in waveguide, I and V are the pumping current and voltage, respectively. The result is shown in Fig. 2(b). A wcWPE of 4.3% is achieved with a pumping current of 105 mA counting only the two designated output ports (ports 3 and 4). The wcWPE is 5.5% when considering all four ports. The wcWPE starts to fall after 105 mA due to thermal roll over.

Figure 3 shows the lasing spectrum near the laser output wavelength measured by an optical spectrum analyzer (OSA) with a resolution of 0.16 pm. The pumping current is 105 mA for this measurement. The right panel shows the enlarged portion of the spectrum near the lasing peak. The line width of the lasing peak is measured to be ~0.8 pm (100 MHz). The measured side mode suppression ratio (SMSR) is 35 dB.

 

Fig. 3 Lasing spectrum of the lasing mode, right side is the enlarged portion near the lasing mode.

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4. Thermal tuning of the laser

The thermal tuning efficiency is first characterized by measuring the drop port transmission spectra (input from port 1 and output from port 2) at different tuning powers as shown in Fig. 4. A tuning efficiency of 2.7 nm/mW was achieved. For the ring with radius of 5 µm used in the experimental demonstration, the free spectrum range is about 20 nm and, therefore, requires 7.5 mW to tune a 2π phase across the whole FSR. Up to 3 times higher ring tuning efficiency is possible with appropriate design and thermal isolation, showing the scalability of this approach for tunable lasers [1]. In practice, a tuning range smaller than the ring FSR will be needed, particularly when using cascaded WDM resonant modulators in a synthetic resonant comb configuration [8].

 

Fig. 4 Transmission spectra of the ring at different tuning power. Light is launched from port 1 and measured from port 2.

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This high tuning efficiency was made possible by locally removing the SOI handle substrate underneath the ring [1]. A backside pit with a diameter of 200 µm was etched up to the BOX layer to help isolate the heat and improve the thermal tuning efficiency. We have confirmed that the thermal tuning efficiency increased by about 10 times, compared to the device without the backside pit.

We next demonstrated the tunability of the hybrid laser and characterized the tuning efficiency. The lasing spectra at different tuning powers in Fig. 5(a) confirm the single mode lasing of the hybrid laser. The lasing spectra were measured by an OSA with a resolution of 30 pm. The pumping current of the gain chip was fixed at 105 mA, where the maximal WPE was achieved. The wavelength tuning efficiency is measured to be 2.2 nm/mW, which is smaller than the thermal tuning efficiency without coupling to the RSOA chip. This could be explained by the fact that the RSOA chip introduces another heat dissipation channel and, therefore, slightly reduces the thermal tuning efficiency. The small contact area between the RSOA and the silicon chip minimizes the degradation of the tuning efficiency. Careful thermal management to provide good thermal isolation for the ring is required to maintain the high tuning efficiency for future high-density integrated laser arrays. By removing the backside handle substrate, we have significantly improved the tuning efficiency compared to the state of the art results reported in literature for waveguide-coupled silicon hybrid lasers [12]. This thermal-optical tuning efficiency is comparable to the best short-wavelength MEMS-based VCSEL [17]. As mentioned above, this tuning efficiency can be increased by appropriate design and thermal isolation of the ring. More importantly, we also dramatically enhanced the wcWPE by eliminating the power-inefficient TEC.

 

Fig. 5 (a) Lasing spectra of hybrid laser with different tuning power. (b) Lasing wavelength as a function of tuning power. The pumping current for the gain chip is fixed at 105 mA.

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The lasing wavelength at different tuning powers in Fig. 5(b) shows a tuning range between 1557 nm and 1575 nm. The tuning range is determined by the FSR of the ring, the grating coupler spectrum, and the gain spectrum of the III/V chip, which has a center wavelength at 1566 nm. The step in Fig. 5(b) at 8 mW represents the lasing of the next peak of ring resonance. The cavity mode spacing shown in Fig. 5(a) can lead to mode hopping during the tuning. This will be addressed in future work.

5. Conclusion

We have demonstrated an efficient, tunable C-band, external-cavity, silicon-assisted hybrid laser by vertically integrating a III/V gain chip with a silicon ring reflector using a grating coupler. This grating coupler based integration approach is scalable to a high density two-dimensional laser array. Its vertical-coupled nature makes it possible to optimize the silicon chip and gain chip independently without compromising the performance of either chip. We additionally integrated a microheater in the ring-reflector to tune lasing wavelength. Localized substrate removal was used to improve the ring tuning efficiency by 10x. The resulting tunable C-band laser simultaneously achieved a high waveguide-coupled wall-plug-efficiency of up to 5.5% and a high tuning efficiency of up to 2.2 nm/mW. In addition to its high wcWPE and tuning efficiency, it also achieved single mode lasing with a SMSR of 35 dB across an 18 nm tuning range. Together with a large output power useful for WDM links (>10 mW), this demonstration shows a pathway towards an energy-efficient source for future large-scale silicon photonic interconnects. The wcWPE could be further improved by optimizing the optical modes to reduce the coupling loss between the gain chip and the silicon chip. This external-cavity hybrid laser technique enables silicon-controlled lasing and can be extended to other wavelength ranges compatible with silicon waveguides (e.g. 1.3 μm) with even higher wcWPE.