1. Introduction

III-nitride devices have had a significant energy-savings impact on worldwide electricity consumption, especially due to the use of light-emitting diodes (LEDs) for white lighting. Flip-chip LEDs, particularly thin-film flip-chip (TFFC) geometries, have become increasingly attractive because they allow for high light extraction, improved heat extraction, and decreased current crowding [1–3]. In addition, recent reports of LEDs grown on bulk GaN have demonstrated advantages of homoepitaxy over heteroepitaxy. These studies reported improvements such as low dislocation densities in the epitaxial material and high external quantum efficiencies (EQEs) at high current densities [4,5].

TFFC LEDs made from heteroepitaxially grown epitaxy (e.g. GaN on sapphire) are typically fabricated by using a laser lift-off (LLO) method. The LLO method uses a high-power laser that is rastered over the LEDs to decompose the material at the GaN/sapphire interface [6]. However, LLO may lead to cracks in the LEDs, which can reduce yield, and it is a serial process where each LED is separated individually, which can reduce throughput [7–9]. In addition, it is not compatible with epitaxial layers grown on SiC or freestanding GaN substrates. Therefore, there is a need for a flip-chip process that is damage-free, allows for high throughput, and can be used with substrates other than sapphire.

Photoelectrochemical (PEC) liftoff is a technique that utilizes lateral PEC undercut etching and can be used to fabricate flip-chip LEDs. PEC etching on GaN was first used by Minsky et al. for top-down etching [10]. The etch is dislocation dependent and is limited in areas with high threading dislocation densities (TDD) due to the recombination of minority carriers in the vicinity of dislocations [11,12]. The etch rate is also crystallographically dependent [12]. Lateral etching of selectively excited III-nitride layers has been used to create deeply undercut structures grown on sapphire [13], to create undercut apertures in laser diode structures on bulk m-plane and semipolar $(20\overline{2}\overline{1})$ GaN substrates [14], to lift off vertical-cavity surface-emitting lasers (VCSELs) from bulk m-plane GaN substrates [15,16], and to remove blue LEDs from bulk semipolar $(20\overline{2}\overline{1})$ GaN substrates [17].

GaN is relatively chemically inert [18], but the N-face of GaN reacts to various chemical solutions, including potassium hydroxide [19,20]. Immersion in KOH yields hexagonal pyramids. These geometrical features are critical in improving extraction efficiency since they disrupt total internal reflection and widen the light-escape cone [20,21].

Using PEC liftoff for LEDs grown on freestanding c-plane GaN substrates has various implications. By transferring the devices from a bulk substrate to another submount, the substrate can be planarized and polished for subsequent growths. Multiple reuses will offset the high costs of bulk GaN substrates [22], making bulk substrates more affordable and practical. Furthermore, removing the GaN substrate is of interest for certain UV LED designs, since the substrate is highly absorbing in that regime [23].

In this work, we demonstrate PEC liftoff of LEDs on bulk c-plane GaN substrates. The process causes no damage to the devices, is a batch process as all LEDs are undercut at the same time, is compatible with freestanding GaN substrates, and enables substrate reuse.

2. Experimental

The LED structures were grown by metalorganic chemical vapor deposition (MOCVD) on freestanding c-plane GaN substrates from Sciocs Company Limited with a threading dislocation density of approximately 4x10⁶ cm⁻². The epitaxial structure for the flip-chip LEDs, shown in Fig. 1(a), consisted of 1.5 µm n-GaN; a sacrificial layer with 6 multiple quantum wells (MQWs) with 2.5 nm InGaN wells and 7 nm GaN barriers with emission at 430 nm; a 3 µm n-GaN interlayer; an active region with 6 MQWs with 2.5 nm InGaN wells and 7 nm GaN barriers with emission at 440 nm; a 10 nm Mg-doped AlGaN electron blocking layer (EBL); a 110 nm Mg-doped p⁺-GaN layer; and a 20 nm p⁺⁺-GaN contact layer.

 

Fig. 1 Cross-sectional schematic of (a) the as-grown epitaxial structure, (b) a partially processed sample after wafer-bonding and before PEC etching, and (c) a completely processed sample with p-GaN down and the N-face of n-GaN up.

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Test samples for characterizing the PEC undercut etch were also grown by MOCVD on freestanding c-plane GaN substrates. The epitaxial structure consisted of 1.5 µm n-GaN; a sacrificial layer with 6 MQWs with 2.5 nm InGaN wells and 7 nm GaN barriers with emission at 430 nm; a 110 nm Mg-doped p⁺-GaN layer; and a 20 nm p⁺⁺-GaN contact layer.

The LED samples were processed into mesas that were defined using an inductively coupled plasma (ICP) dry etch. The total LED area was 0.1 mm². The etch went through the active region MQWs and stopped in the n-GaN interlayer. 100 nm of SiN_x were deposited using plasma-enhanced chemical vapor deposition (PECVD) to cover the sidewalls of the active region. A p-contact consisting of 50/500 nm Pd/Au was deposited by electron beam evaporation. This top Au layer also served as a bonding pad for subsequent flip-chip bonding. The sidewalls of the sacrificial MQWs were then exposed by a second dry etch right outside the first mesa. Finally, a cathode of 20/100 nm Ti/Au was deposited in the field outside the mesas to facilitate PEC etching. During PEC etching, this cathode served to extract electrons into solution. As illustrated in Fig. 1, the sidewalls of the active region were protected by SiN_x, while the sidewalls of the sacrificial layer were exposed for PEC undercut etching.

A flip-chip submount was prepared by depositing 20/1000 nm of Ti/Au onto a sapphire wafer. This submount and the sample were etched in O₂ plasma at 300 torr and 100 W for 3 minutes to remove organic residue and prepare for flip-chip bonding. The submount and sample were bonded using a flip-chip die bonder at a force of 300 N at 330 °C for 1 minute, resulting in a bonded sample configuration shown in Fig. 1(b). The bonded sample was placed in 1 M KOH with backside illumination for 5 hours for PEC undercut etching. The light source was an LED array emitting at 405 nm. This process resulted in the removal of the freestanding GaN substrate and the transfer of the LEDs to the submount. A final n-contact consisting of 20/1000 nm Ti/Au was deposited, resulting in the structure shown in Fig. 1(c).

After n-contact deposition, LED 1 was examined by optical microscopy and scanning electron microscopy (SEM) and packaged without further roughening of the surface. LED 2 was intentionally roughened to improve light extraction. LED 2 was etched in heated KOH at 75 °C with no illumination for 10 minutes, examined by optical microscopy and SEM, etched for another 15 minutes, examined again, and packaged. Packaging included dicing, mounting onto silver headers, wire-bonding, and encapsulating in silicone with a refractive index of 1.4.

3. Results and Discussion

The key components of the structure for PEC liftoff were the sacrificial MQWs and n-GaN interlayer. The undercut etch was carried out by electron-hole pairs that were photogenerated in the sacrificial MQWs by an above band-gap light source. Holes were confined in this n-i-n structure and reacted with KOH to oxidize the sacrificial layer, which was then dissociated (and effectively etched) in KOH. Figure 2 illustrates the etch behavior of the sacrificial region. Bright-field optical and fluorescence images of the n-i-n-p test samples described above were taken to show the time progression of the etch. Mesas were patterned on the test samples to expose the sacrificial layer. At the onset of the etch, the bright-field image showed an intact mesa (Fig. 2(a)), and the fluorescence image showed emission from the sacrificial layer (Fig. 2(d)). As time progressed, the etch front proceeded to undercut the mesa, as shown in the bright-field images (Figs. 2(b) and 2(c)). At corresponding areas in the fluorescence images (Figs. 2(e) and 2(f)), the sacrificial region was black, indicating the MQWs had been etched.

 

Fig. 2 (a-c) Bright-field optical and (d-f) fluorescence images of mesa structures after 1 minute (a, d), 10 minutes (b, e), and 45 minutes (c, f) of PEC undercut etching in 1 M KOH with a 405 nm LED array.

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As the lateral undercut proceeded, the N-face of the n-GaN interlayer was exposed to KOH and unintentional roughening occurred. The n-GaN interlayer was grown relatively thick (3 µm) to allow for this concurrent roughening. If the sample was left in solution for too long the vertical roughening would have reached the active region and etched the MQWs.

The surfaces of the fabricated flip-chip LEDs were studied by SEM and optical microscopy. Figure 3(a) shows the effect of unintentional roughening on LED 1, which was not etched in heated KOH. The surface had sparsely distributed hexagonal pyramids with most feature sizes smaller than 200 nm. Figures 3(b) and 3(c) show the surfaces of LED 2 after 10 and 25 minutes of roughening in heated KOH, respectively. Compared with LED 1, LED 2 had more densely packed pyramids with most feature sizes between 140 and 400 nm after 10 minutes of roughening and most feature sizes between 400 and 650 nm after 25 minutes. The larger pyramids, which had feature sizes on the order of the wavelength of light emitted from the active region, contributed to improved light extraction from the LED. The percentage of flat area also decreased with longer immersion in KOH. For LED 1, about ~70% of the area was flat. For LED 2, the percentage decreased from ~30% with 10 minutes of roughening to ~10% with 25 minutes of roughening. The effects of roughening can be seen in the optical micrographs in Figs. 3(d)-3(f), where the roughest sample appeared black because it effectively scattered the visible light from the microscope objective. The extraction capability of the LEDs depends on both the presence of flat area, which contribute to total internal reflection, and the size of the pyramids, which must be larger than the wavelength of light within the medium in order to scatter the light [24].

 

Fig. 3 (a-c) SEM and (d-f) optical microscope images of the surfaces of LED 1 after 0 minutes of thermal roughening (a, d), LED 2 after 10 minutes of thermal roughening (b, e), and LED 2 after 25 minutes of thermal roughening (c, f).

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Previous studies [25] reported that the density of the pyramids was correlated with the TDD. Since the TDD of the pyramids for GaN grown on sapphire was on the same order as the TDD, it was postulated that pyramids formed around dislocations. For this study, the TDD of the bulk GaN substrate was 10⁶ cm⁻², while the densities were 5.4x10⁸ cm⁻², 3.6x10⁹ cm⁻², and 1.0x10⁹ cm⁻² for LED 1, LED 2 with 10 minutes of roughening, and LED 2 with 25 minutes of roughening, respectively. These densities indicate that the formation of the pyramids is not initiated solely by threading dislocations. This non-dislocation related etch behavior has also been reported previously [26].

Figure 4(a) shows the I-V curves for LEDs 1 and 2 after flip-chip processing. LED 1 had a turn-on voltage below 3.5 V. LED 2 had a higher turn-on voltage due to variations across the wafer from growth. The I-V curve of LED 2 was comparable before and after processing. It was possible to operate the device at high current densities without creating a short, demonstrating the mechanical integrity of the TFFC LED following PEC liftoff. The peak emission wavelength of both LEDs is around 432 nm with a full-width half max (FWHM) of 15 nm (Fig. 4(b)). The effects of roughening on LED performance are shown in Figs. 4(c) and 4(d). The LEDs had areas of 0.1 mm², so 1 mA corresponded to a current density of 1 A/cm². At the peak EQE (at a current density of 36 A/cm²), the output power and EQE were 10.3 mW and 9.9%, respectively, for LED 1 and 14.6 mW and 14.1%, respectively for LED 2. Roughening resulted in a 42% improvement in output power and EQE.

 

Fig. 4 (a) I-V curve for LEDs 1 and 2 after flip-chip processing. 1 mA of current corresponds to a current density of 1 A/cm². (b) Electroluminescence spectra showing a peak wavelength around 432 nm with a FWHM of 15 nm. (c) Dependence of light output power on current. (d) Dependence of EQE on current. An improvement of 42.5% is seen in output power and EQE with roughening.

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Although this work proved the feasibility of using PEC liftoff for creating TFFC LEDs from epitaxial layers grown on freestanding c-plane GaN substrates, there are several changes that could be made to improve device performance. Growth optimizations are necessary to improve the performance of these LEDs, as none were done in the development of this method. Incorporating a Ag-based p-contact would significantly improve the extraction efficiency, as the Pd/Au p-contact that was used above had a relatively low reflectivity. Ray tracing simulations show at least a 3x improvement in the extraction efficiency when using a Ag-based p-contact instead of a Pd/Au p-contact. Finally, using a SiC submount instead of sapphire would improve heat extraction due to its higher thermal conductivity.

4. Conclusion

We have demonstrated a TFFC process for LEDs grown on freestanding c-plane GaN substrates that utilizes PEC liftoff for layer transfer. As an alternative to LLO, PEC liftoff causes no damage to the devices, is a batch process as all LEDs are undercut at the same time, is compatible with freestanding GaN substrates, and enables substrate reuse. This process was applied to LEDs emitting at a wavelength of 432 nm with a turn on voltage of ~3 V. Etching the LEDs in heated KOH after transferring them to a submount increased the peak EQE by 42.5% from 9.9% (unintentionally roughened) to 14.1% (intentionally roughened).