Integrated electro-optical phase-locked loop for high resolution optical synthesis

Farshid Ashtiani; Firooz Aflatouni

doi:10.1364/OE.25.016171

1. Introduction

The frequency synthesis is performed by phase locking a tunable oscillator to a stable and low-noise reference oscillator, creating a tunable signal with the stability and noise performance of the reference oscillator. Optical synthesizers [1–8] have many applications such as metrology [1,2], spectroscopy [3,4], and optical communication [5]. Recent advancements in demonstration of integrated optical frequency combs [9–11] enable implementation of a highly stable frequency comb serving as the reference signal for the EOPLL in an integrated optical synthesizer. Figure 1 shows the conceptual block diagram of an integrated heterodyne optical synthesizer where an EOPLL phase locks the tunable slave laser to one of the frequency comb teeth serving as the reference signal. Under the lock condition, the frequency difference between the reference laser and the slave laser is equal to the heterodyning local oscillator (LO) frequency [12]. To span the space between consecutive comb teeth, the LO frequency is continuously tuned. Therefore, the architecture of the EOPLL must be designed such that the EOPLL remains phase locked while the LO heterodyning signal is frequency tuned.

Fig. 1 Block diagram of a heterodyne optical synthesizer.

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EOPLLs as the core of optical synthesizers have been studied and demonstrated using both bench-top [13–17] and partially integrated implementations [12,18]. Large phase locking bandwidth has been achieved for an EOPLL with electronic and photonic circuits implemented on two separate III-V platforms [19,20].

Standard complementary metal oxide semiconductor (CMOS) SOI processes offer high degree of optical confinement, high fabrication yield, low-cost, scalability to large-volume production, and co-integration with sophisticated electronic circuits [21–23] and therefore are suitable candidates for EOPLL system integration at infrared regime.

Here we report the demonstration of an EOPLL integrated on the GLOBALFOUNDRIES GF7RFSOI, a standard 180 nm CMOS-SOI process. We have designed photonic devices on GF7RFSOI process (without post-processing) that were co-integrated with standard electronic devices to realize a novel reconfigurable phase-frequency locking architecture suitable for phase locking many different types of tunable lasers in the 1510 nm - 1590 nm wavelength range. Furthermore, co-integration of electronic and photonic devices on the same chip reduces the on-chip loop delay which significantly improves the EOPLL stability compared to bench-top and partially integrated implementations. By using the reported architecture, the EOPLL acquisition and tracking ranges are significantly improved and the tunable laser can be continuously tuned while maintaining phase lock which is a key feature for reliable optical synthesis.

2. EOPLL non-linear theory of operation

The frequency of a semiconductor laser can be tuned by changing its gain section bias current and therefore it can be modelled as a current controlled oscillator (CCO) [24]. This is illustrated in Fig. 2(a). In this case, a change of i_c(t) in the laser bias current results in a change of $K_{l a s e r} \int i_{c} (t) d t$ in the instantaneous phase of the laser electric field, where K_laser is the laser current to frequency conversion gain.

Fig. 2 The EOPLL principle of operation. (a) The semiconductor laser modelled as a current controlled oscillator, (b) an optical phase detector, and (c) the conceptual block diagram of an EOPLL in presence of loop delay.

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Also, the instantaneous phase difference between two lasers can be detected by combining the electric field of two lasers followed by photo-detection [17]. This is shown in Fig. 2(b) where the electric fields of two lasers, $E_{1} = \sqrt{P_{1}} e^{j Φ_{1}}$ and $E_{2} = \sqrt{P_{2}} e^{j Φ_{2}}$ are combined and photo-detected. The photo-current is written as $i (t) = R [P_{1} + P_{2} + 2 \sqrt{P_{1} P_{2}} \cos (Φ_{1} - Φ_{2})]$ , where R, P₁, P₂, $Φ_{1}$ and $Φ_{2}$ are the photodiode responsivity, the optical power of the first and second lasers, and the instantaneous phase of the first and second lasers, respectively. Using this optical phase detector a semiconductor laser can be phase locked to a reference laser. The conceptual block diagram of an electro-optical phase locked loop (EOPLL) in the phase domain is depicted in Fig. 2(c) where $Φ_{i} = ω_{i} t$ , $Φ_{o}$ and $Φ_{e} = Φ_{i} - Φ_{o}$ are the input phase, the output phase, and the phase error, respectively. Also, f_PD(.), f_Loop(t), and t_d are the non-linear impulse response of the phase detector, the loop filter impulse response, and the loop propagation delay, respectively. In addition, $ω_{i}$ and $ω_{o}$ are the reference laser frequency and the free-running frequency of the slave laser, respectively.

The non-linear delay differential equation associated with the EOPLL in Fig. 2(c) is written as

\frac{d Φ_{e} (t)}{d t} + K \cos (Φ_{e} (t)) * f_{L o o p} (t) * δ (t - t_{d}) = Δ ω .

where

Δ ω = ω_{i} - ω_{o}

and

K = 2 \sqrt{P_{1} P_{2}} K_{l a s e r}

are the difference between the reference laser frequency and the slave laser free-running frequency and the loop gain, respectively. Also, “*” denotes convolution. For the first order loop, no loop filter is placed in the PLL, that is, f_Loop(t) is replaced by

δ (t)

where

δ (.)

is the Dirac delta function. In this case Eq. (1) is modified to

\frac{d Φ_{e} (t)}{d t} + K \cos (Φ_{e} (t - t_{d})) = Δ ω .

To study the effect of the loop delay on the loop stability, perturbation theory can be used [25]. Consider the case that the phase error, $Φ_{e}$ is perturbed around its steady state. In this case, the phase error can be written as $Φ_{e} = Φ_{e, s s} + δ Φ_{e}$ where $Φ_{e, s s}$ is the steady state phase error and $δ Φ_{e}$ is the perturbation. Equation (2) is then modified to:

\frac{d δ Φ_{e} (t)}{d t} + K \cos (Φ_{e, s s} + δ Φ_{e} (t - t_{d})) = Δ ω .

Since the perturbation is by definition small, the cosine term in Eq. (3) can be simplified as

\begin{array}{l} \cos (Φ_{e, s s} + δ ​ Φ_{e} (t - t_{d})) = \\ \cos (Φ_{e, s s}) \cos (δ Φ_{e} (t - t_{d})) - \sin (Φ_{e, s s}) \sin (δ Φ_{e} (t - t_{d})) \\ \approx \cos (Φ_{e, s s}) - δ Φ_{e} (t - t_{d}) \sin (Φ_{e, s s}) . \end{array}

Also, under steady state condition, $\frac{d Φ_{e, s s} (t)}{d t} = 0$ and Eq. (3) results in

\sin (Φ_{e, s s}) = \pm \sqrt{1 - {(\frac{Δ ω}{K})}^{2}} .

Using Eqs. (4) and (5), Eq. (3) is modified to

\frac{d δ ​ Φ_{e} (t)}{d t} + K (\frac{Δ ω}{K} \mp δ Φ_{e} (t - t_{d}) \sqrt{1 - {(\frac{Δ ω}{K})}^{2}}) = Δ ω .

The characteristic equation for Eq. (6) is written as $s = \pm \sqrt{K^{2} - Δ ω^{2}} (e^{- s t_{d}})$ . Multiplying both sides of this equation by $t_{d} e^{s t_{d}}$ results in

s t_{d} e^{s t_{d}} = \pm t_{d} \sqrt{K^{2} - Δ ω^{2}} .

The solution to Eq. (7) can be written in terms of complex Lambert function [26] as

s t_{d} = W (\pm t_{d} \sqrt{K^{2} - Δ ω^{2}}) .

where W(.) represents the complex Lambert function that satisfies

W (z) e^{W (z)} = z

. The EOPLL described by Eq. (2) is stable if the real part of the solution to the characteristic equation is negative which requires

W (\pm t_{d} \sqrt{K^{2} - Δ ω^{2}}) < 0

. For the complex Lambert function, W(z), the real part of W is non-positive only if

- π / 2 \leq z \leq 0

[27], resulting in stability condition as

0 \leq K \leq \frac{π}{2 t_{d}} \sqrt{1 + {(\frac{2 t_{d} Δ ω}{π})}^{2}} .

Equation (9) shows that the maximum stable loop gain is inversely proportional to the loop delay. Since the tracking and acquisition ranges of a PLL are directly proportional to the loop gain [25], the loop delay limits the tracking and acquisition ranges.

Most practical phase locked loops can be modelled as a second order loop [25] where f_Loop(t) represents a non-zero pole in the loop transfer function. In this case, the non-linear delay differential equation of the EOPLL, Eq. (1), is written as

a \frac{d^{2} Φ_{e} (t)}{d t^{2}} + \frac{d Φ_{e} (t)}{d t} + K \cos (Φ_{e} (t - t_{d})) = Δ ω .

where

f_{L o o p} (t) = e^{- a t} u (t)

, corresponding to a pole at

ω_{p} = - 1 / a

, is considered and u(t) represents the step function. Perturbing the phase error around the steady state point results in the characteristic equation for Eq. (10) as

\frac{d^{2} δ Φ_{e} (t)}{d t^{2}} + \frac{1}{a} \frac{d δ Φ_{e} (t)}{d t} \pm \frac{K}{a} \sqrt{1 - {(\frac{Δ ω}{K})}^{2}} δ Φ_{e} (t - t_{d}) = 0.

Equation (11) is a linear delay differential equation known as the Lienard equation [28]. The Lienard delay differential equation $d^{2} x / d t^{2} + A (d x / d t) + B x (t - t_{d}) = 0$ represents a stable system if for A,B > 0, $B x^{2} (B t_{d} - A) < 0$ is satisfied [27, 28]. Therefore, the second order EOPLL is stable if

K < \frac{1}{t_{d}} \sqrt{1 + {(Δ ω t_{d})}^{2}} .

Equation (12) shows that similar to the first order EOPLL, the maximum stable loop gain of a second order EOPLL is inversely proportional to the loop delay and hence is significantly improved with system integration.

3. System design and device characterization

Figure 3(a) shows the schematic of the integrated EOPLL. Both reference and slave tunable lasers are coupled into the chip using grating couplers (GC), guided using nanophotonic waveguides, and combined using a Y-junction. The Y-junction output is then backside coupled to a vertical InGaAs photodiode using a grating coupler. The output of the photodiode is wire-bonded to the input of the electronic circuit for further processing.

Fig. 3 Reported EOPLL with integrated photonic and electronic devices. (a) Schematic of the EOPLL chip. (b) The EOPLL chip microphotograph.

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The output of the chip is fed back to the laser to close the loop. In this case, on-chip optical and electrical interconnects reduce the total loop delay. The analysis presented in Section 2 shows that the maximum stable loop gain is inversely proportional to the loop delay. Therefore, compared to bench-top implementations, integrated implementations can significantly improve the EOPLL stability.

Figure 3(b) shows the microphotograph of the electronic-photonic chip integrated on GF7RFSOI process with the photodiode mounted on top. The photonic test structures used for device characterization are depicted in Fig. 4. At 1550 nm, the measured grating coupler efficiency, the nanophotonic average waveguide loss, and the Y-junction excess loss are 27%, 1.3 dB/mm, and 0.5 dB, respectively. Note that while we have successfully implemented many photonic devices on GF7RFSOI process, a wide band photodiode with high responsivity cannot be implemented since no material with efficient absorption coefficient at 1550 nm (e.g. Ge) is available in this standard electronic process.

Fig. 4 Characterization of integrated photonic structures. (a) Two back-to-back grating couplers implemented for coupling efficiency measurement. (b) The measured coupling efficiency of the grating coupler with peak efficiency at 1560 nm for coupling angle of 17°. (c) Waveguides with different lengths. (d) The measured propagation loss of a 1 mm long 500 nm wide nanophotonic waveguide after de-embedding the effect of grating couplers and averaging over several chips. (e) Cascaded Y-junctions implemented for transmission characterization. (f) Transmission of the on-chip Y-junctions with measured average excess loss of 0.5 dB.

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Besides the loop delay, the FM response of the slave laser gain section can significantly affect the stability of the EOPLL. In standard single gain section semiconductor lasers, two opposing mechanisms, the thermal effect and the charge carrier effect, perturb the laser gain medium index of refraction creating a phase reversal in the FM response of the laser. As a result, a large phase drop occurs at the cross-over frequency [29] in the sub-10 MHz range that can cause instability for large enough loop gain. Therefore, for stable operation, the loop gain-bandwidth product must be limited.

On the other hand, since both tracking and acquisition ranges of a phase locked loop are proportional to the loop gain [25], it is desired to operate at the largest possible loop gain. In addition, given the laser full-width at half-maximum (FWHM) linewidth, the loop bandwidth must be large enough to provide selectivity required for phase detection. Thus, given the phase cross-over frequency in the FM response, there is a trade-off between the EOPLL acquisition/tracking range and the laser FWHM linewidth. The gain and bandwidth of EOPLL blocks are reconfigurable to ensure that the synthesizer can operate with many types of tunable lasers.

Figure 5(a) shows the block diagram of the reported EOPLL. The reference and slave lasers are coupled into the SOI chip, combined using a Y-junction, and photo-detected. The photocurrent, which is the beat note between the reference and the slave laser, is a sinusoidal signal containing the instantaneous phase difference between the reference and slave lasers and flows back to the SOI chip using bond wires. This photocurrent is amplified and converted to a voltage using a trans-impedance amplifier (TIA).

Fig. 5 The block diagram of the EOPLL and frequency acquisition principle of operation. (a) Block diagram of the EOPLL chip with three paths: the frequency detection path, the phase detection path, and the integrator path. (b) Frequency detection principle of operation in the complex frequency plane is shown. Each diagram shows the frequency spectrum of the corresponding node in Fig. 5a. “I” and “Q” represent cosine and sine functions, respectively.

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A poly-phase filter [30] is used to convert the TIA output voltage, the beat-note signal at frequency f_RF, to two signals with 90° phase difference (referred to as the quadrature signals). Four active mixers are used to perform quadrature mixing of the poly-phase filter output and the differential quadrature signals generated from the off-chip LO heterodyning signal at frequency f_LO. The quadrature mixer output is used in three different paths; the frequency detection path, the phase detection path, and the integration path. Figure 5(b) illustrates the frequency detection principle of operation in a complex frequency plane. Note that the imaginary plane is rotated by 90° with respect to the real plane to ease the illustration. The quadrature mixer outputs at nodes (1) and (2) are combined to eliminate the upper sideband at f_RF + f_LO at node (5). Similarly, the upper sideband at node (6) is eliminated. Low-pass filtering attenuates the components at f_RF and f_LO at nodes (7) and (8).

Differentiating the signal at node (7) results in 90° counter-clock-wise rotation of all signals as shown at node (9). Then, signals at nodes (8) and (9) are multiplied and low-pass filtered resulting in the desired signal at DC at node (10). The amplitude of the DC signal at node (10) is linearly proportional to the frequency error, f_LO – f_RF.

The phase detection path is used to phase lock the slave laser to the reference laser. In this case, the signal at node (6) which is proportional to the instantaneous phase difference between the beat-note and the heterodyning LO signal is used for phase locking. Under the lock condition, the phase and frequency difference between the reference and slave lasers are set by the phase and the frequency of the LO heterodyning signal.

The integrator path increases the loop gain at low frequencies and hence increases the tracking range [25]. The signal at node (5) is amplified, integrated, and combined with the outputs of the frequency detection and the phase detection paths and is injected to the laser. The gain and bandwidth of all three paths can be adjusted to enable phase and frequency locking of various slave lasers with different characteristics.

4. Measurement setup and experimental results

As explained in section 3, frequency detection relies on quadrature RF and LO signal generation. Hence, amplitude and phase mismatch between these quadrature signals can affect the frequency locking performance. Figures 6(a) and 6(b) show the measured amplitude and phase mismatch between the signals at nodes (5) and (6) in Fig. 5(a), respectively.

Fig. 6 Measured (a) amplitude and (b) phase mismatch at the output of quadrature mixers (nodes (5) and (6) in Fig. 5(a)). (c) The measured characteristics of the frequency detection path when the frequency of the heterodyning signal is set to 900 MHz.

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Figure 6(c) shows the measured characteristics of the frequency detection path versus simulation result for the case that the LO frequency is set to 900 MHz. When the beat-note frequency, f_RF, is larger (smaller) than the heterodyning frequency, f_LO, a positive (negative) voltage is generated at node (10) tuning the slave tunable laser such that f_RF moves towards f_LO leading to frequency locking. When the beat-note frequency is within the EOPLL phase acquisition range, the phase detection path performs phase locking. At his point, the voltage at node (10) is zero (f_RF ≈f_LO) and the frequency locked loop is disengaged.

The closed loop measurement setup is depicted in Fig. 7. A low-noise current source is used to bias the slave tunable laser to minimize the effect of the noise of the laser driver on the laser linewidth. A monitoring pad at the output of the photodiode has been wire-bonded and used to monitor the beat-note lock spectrum on a RF spectrum analyzer. The LO in-phase and quadrature signals are generated off-chip using a RF synthesizer followed by one 180° and two 90° hybrid power splitters. The total estimated on-chip propagation delay due to optical waveguides is under 30 ps. The estimated propagation delay due to optical and electrical interconnects between the EOPLL chip and the slave laser is under 2 ns.

Fig. 7 Measurement setup used for monitoring the lock spectrum.

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Figures 8(a) to 8(e) show the lock spectrums (the beat-note) for different heterodyning LO frequencies confirming that the reported integrated EOPLL can acquire phase and frequency lock over a large range of heterodyning signal frequency. Furthermore, when the EOPLL is locked, the LO heterodyning signal can be continuously tuned while the EOPLL maintains lock which is an essential feature for optical synthesis. Table 1 summarizes the EOPLL performance in comparison with other published EOPLLs. Videos of phase locking are included in the Visualization 1 and Visualization 2 that show acquisition and reliable locking of a commercially available laser to a reference laser, respectively.

Fig. 8 (a) – (e) The lock spectrum when the heterodyning frequency is set to 500 MHz, 728 MHz, 897 MHz, 1.01 GHz, and 1.27 GHz, respectively. The heterodyning frequency can be widely tuned while the EOPLL remains phase and frequency locked.

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Table 1. Performance comparison with previously published works.

View Table

5. Conclusion

In conclusion, we have demonstrated an integrated EOPLL implemented on a standard CMOS SOI process. The introduced novel architecture and the reduced on-chip loop delay enable low-cost low-power robust locking and wideband tuning which are key features for optical synthesizers.

Funding

Defense Advanced Research Projects Agency - DARPA (HR0011-15-C-0057).

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Name	Description
Visualization 1: MOV (1587 KB)	Visualization 1
Visualization 2: MOV (14182 KB)	Visualization 2

Parameter	III-V Platform [19]	Si Platform [17]	This work
Area	10 mm x 10 mm* (Electronic chip, off-chip loop filter, and photonic chip with integrated laser)	1.6 mm x 2.2 mm (only electronics)	1.2 mm x 2 mm
Power Consumption	N/A	140 mW	28.5 mW
Acquisition Range	−9 GHz to 7.5 GHz	± 1 GHz	± 40 MHz
Process	InP HBT (electronics) InGaAsP/InP (photonics) Two separate chips.	130 nm CMOS (Integrated electronics, bench-top optics)	180 nm CMOS SOI (co-integration of electronics and photonics)

Integrated electro-optical phase-locked loop for high resolution optical synthesis

Abstract

1. Introduction

2. EOPLL non-linear theory of operation

3. System design and device characterization

4. Measurement setup and experimental results

5. Conclusion

Funding

References and links

Supplementary Material (2)

Cited By

Figures (8)

Tables (1)

Equations (12)

Optics Express