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Abstract
The high-performance 395 nm GaN-based near-ultraviolet (UV) light emitting diodes (LEDs) on Si substrates have been obtained by designing an AlN buffer layer to decrease the dislocations density of the GaN layer. By adopting a multi-layer structure with a high- and low-V/III ratio alternation, a high-quality AlN buffer layer has been obtained with a small full-width at half-maximum (FWHM) for AlN(0002) X-ray rocking curve (XRC) of 648 arcsec and a small root-mean-square roughness of 0.11 nm. By applying the optimized AlN buffer layer, the high-quality GaN layer with GaN(0002) and GaN(10-12) XRC FWHM of 260 and 270 arcsec have been obtained, and the high-performance GaN-based near-UV LED wafers and chips have been fabricated accordingly. The as-fabricated near-UV LED chips exhibit a light output power of 550 mW with a forward voltage of 3.02 V at 350 mA, corresponding to a wall-plug efficiency of 52.0%. These chips with outstanding performance are of paramount importance in the application of curing, sterilization, efficient white lighting, etc.
© 2019 Optical Society of America under the terms of the OSA Open Access Publishing Agreement
1. Introduction
Near ultraviolet (UV) light-emitting diodes (LEDs) have received tremendous attention during the past decades because of their promises for wide applications including curing, sterilization, efficient white lighting, etc [1,2]. To date, GaN-based near-UV LEDs have been usually fabricated on sapphire substrates due to the lack of homogeneous substrates [3,4]. Although high-quality GaN-based near-UV LED wafers have been developed, heat dissipation is still a critical issue for the further development of near-UV LEDs result from the low conductivity of sapphire (as low as 25 W m−1 K−1) [5]. Moreover, the heating problem of UV LEDs is much more serious than that of blue light LEDs. Many studies indicate that the light output power (LOP) of the UV LEDs on sapphire substrates decrease rapidly with the increase in temperature [6,7]. Although vertical-structure LED chips have been identified to reduce the heat dissipation problem, the chips fabricated on sapphire substrates by laser lift-off techniques are extremely difficult to be prepared [8]. As compared to sapphire, Si with a high thermal conductivity (130 W m−1 K−1) is a promising substrate for the fabrication of high-power near-UV LED chips [9]. Nevertheless, the preparation of GaN-based near-UV LEDs on Si substrates faces a few challenges, too. Among them, the most important one is that the device performance of near-UV LEDs is sensitive to GaN dislocations density, which is caused by the less protection of indium-related localization in near-UV LEDs [5]. However, the GaN dislocations density is still high up to 109 cm−2 due to the large lattice mismatch between Si and GaN (17%) [10]. Therefore, to achieve high-performance UV LEDs, it is of great importance to enhance the crystalline quality of GaN layer grown on Si substrates.
The AlN buffer layer, which acting as both the bottom buffer layer directly contacting with Si and the compressive stress supplying layer for GaN, its quality has a great influence on the crystalline quality as well as stress management of the subsequent GaN layer [11]. The rough surface and poor crystalline quality of AlN buffer layer would seriously deteriorate the quality of GaN layers. Many studies show that a smooth surface of AlN buffer layer can minimize the crystal misorientation and dislocations density in the GaN layer [11]. However, because of the low surface mobility of Al adatoms [12], the growth mode of AlN is mainly in the form of three-dimensional (3D) growth, leading to rough surfaces and high-density threading dislocations of AlN buffer layer. The growth conditions of the low-V/III ratio and high growth temperature can promote the two-dimensional growth (2D) of AlN buffer layer [13,14]. Oh et. al. used a combined low-high temperature structure for AlN growth, AlN buffer layer on Si substrates shows a relatively small full-width at half-maximum (FWHM) for AlN(0002) X-ray rocking curve (XRC) of 789 arcsec, but the surfaces of these coalesce incompletely. For subsequent GaN layer, the FWHMs for GaN(0002) and GaN(10-12) XRCs are 337 and 353 arcsec, respectively [15]. Lin et al. adopted a two-step (high-V/III and low-V/III ratio) growth technique to grow AlN buffer layer, it reveals an FWHM for AlN(0002) XRC of 2052 arcsec and an RMS roughness of 0.82 nm [16]. In this regard, it is therefore more desirable to look for another effective approach for AlN buffer layer growth for enhancing the quality of GaN layers and the performance of GaN-based UV-LEDs.
In this paper, the high-performance GaN-based 395 nm UV LEDs on Si substrates have been achieved by designing structure of AlN buffer layer. A multi-layer structure with a high- and low-V/III ratio alternation (3D-2D transition) for the growth of AlN buffer layer has been promoted. The structure can reduce tensile strain in the AlN buffer layer, and therefore prompt the surface of AlN buffer layer to merge [16]. Accordingly, the AlN buffer layer in 2D growth mode with high crystalline quality and smooth surface has been obtained for the high-quality GaN layer growth and thereby the high-performance 395 nm UV LED chips on Si substrates.
2. Experimental procedure
The samples were grown on 4-inch Si(111) substrates in a Veeco K465i metal-organic chemical vapor deposition. Hydrogen and nitrogen were used as carrier gas. Trimethylgallium (TMGa), trimethylaluminum (TMAl), and ammonia were used as the precursors for Ga, Al and N, respectively. 4-inch Si (111) substrates were first annealed at the temperature of 1100 °C for 10 minutes to remove the native oxide. Afterwards, the substrates were passivated by TMAl with pre-seeding time of 20 s at 900 °C to avoid the formation of amorphous SiNx layers. Immediately, an AlN nucleation layer was deposited with the temperatures of 800°C. Subsequently, a combined 50 nm-thick AlN layer at 1100 °C with a V/III ratio of 2000 and a 250 nm-thick AlN layer at 1100 °C with a V/III ratio of 500 were grown, named sample A, as shown in Fig. 1(a). Contrastively, a 300 nm-thick AlN layer with the multi-layer structure of high- and low-V/III ratio alternation was grown, named sample B, as shown in Fig. 1(b). On the top of these two AlN buffer layers, a 500 nm-thick graded AlxGa1−xN buffer layers, a 500 nm-thick undoped GaN layer and a 3 μm-thick Si-doped GaN layer, 4-period shallow wells (SWs), 9-period InGaN/GaN multiple quantum wells (MQWs), a 20 nm-thick electrons blocking layer (EBL), and a 50 nm-thick p-GaN were grown in turn, named samples C and D, as shown in Fig. 1(c). Among them, 4-period 3 nm In0.02Ga0.08N/10 nm GaN superlattice layers SWs were grown as the strain relief layers. The corresponding LED chips were also fabricated, as shown in Fig. 1(d). Detailed fabrication processes of vertical-structure LED chips can be found in [17].
Fig. 1 Schematic structures of (a) AlN buffer layer for sample A, (b) AlN buffer layer for sample B, (c) LED wafers for samples C/D and (d) LED chips for samples C/D.
The crystalline quality of the samples was characterized by high-resolution X-ray diffraction (HRXRD, Bruker D8 X-ray diffractometer). The structural property of LED wafers was investigated using high-resolution transmission electron microscopy (HRTEM, JEOL3000F). The crack distribution of LED wafers was characterized by optical microscopy (OM, OLYMPUS, BX51M) and the residual stress was examined by micro-Raman spectroscopy (JobinYvon LabRAM HR800). The surface morphology of AlN layer was examined by atomic force microscopy (AFM, Bruker Dimension Edge). For the characterization of vertical-structure near-UV LED chips, the voltage (V)-current (I), I-V, and light output power (L)-I characteristics were investigated by IPT 6000 system.
3. Results and discussion
The surface morphology of AlN buffer layer was investigated by AFM. For sample A, the surface morphology evolution at different thicknesses of 120, 210 and 320 nm is revealed in Figs. 2(a)-2(c). And the surface of sample B with the same thicknesses compared to sample A, corresponding to three high- and low-V/III ratio transition periods, is presented in Figs. 2(d)-2(f). The Figs. 2(a) and 2(d) both reveal a very rough initial surface with 3D growth. Although the surface of AlN will become smoother with the increase in thickness, apparently, the surface of sample B is smoother than that of sample A in both the second and the third periods. It indicates that the 2D growth of AlN can be enhanced by repeated transitions between the established high- and low-V/III ratio growth. The growth mode of AlN is determined by the diffusion lengths of Al adatoms on the surface under the growth condition in terms of kinetic [18], and enhancing the V/III ratio can decrease the adatom diffusion length of AlN. Therefore, the high-V/III ratio would lead to a 3D growth mode for AlN; while the low V/III ratio would result in a 2D growth for AlN. Repeated growth condition transitions between high- and low-V/III ratio mean that the repeated 3D-2D growth mode transitions, which would release part of the tensile strain formed in AlN layer because of the lattice mismatch between Si and AlN of 19% [16,18–20], and then increase the mobility Al atoms in the subsequent AlN growth, leading to the smooth surface of AlN.
Fig. 2 The AFM images of sample A with the thickness of (a) 120, (b) 210, and (c) 320 nm. And the AFM images of sample B with the thickness of (d) 120, (e) 210, and (f) 320 nm.
To examine the effect of the quality of AlN on the crystalline quality of GaN layer on Si substrates, the FWHM of X-ray diffraction rocking curve (XRC) and the TEM observation were further performed. From Figs. 3(a)-3(b), the FWHM value of AlN(0002) and AlN(10-12) XRC decreases from 1080, 2084 arcsec to 648, 1382 arcsec, respectively, by adopting the repeated high and low V/III ratio alternation technique. It is known that the FWHM value is related to the threading dislocations density in group III-nitrides. The smaller value of the FWHM means the lower dislocation density and the better crystalline quality [16]. The improvement of the crystalline quality for AlN can be attributed to the dislocations bending happened on the process of 3D-2D transitions [21]. Meanwhile, it is clear that the crystalline quality of GaN layer improves significantly with the optimized AlN buffer layer [11]. The FWHM values of GaN(0002) and GaN(10-12) are of 260 and 270 arcsec, as presented in Fig. 3(c). To more intuitively observe the dislocations of GaN layers, the HRTEM images for samples C and D LED wafers were measured as shown in Figs. 3(d) and 3(e), respectively. As compared with Figs. 3(d) and 3(e), a higher-density threading dislocation can be identified in the GaN layer of sample C, specially part of threading dislocations penetrate through the MQWs. Threading dislocations which serve as nonradiative recombination centers that will significantly affect the internal quantum efficiency (IQE). Moreover, for near-UV LEDs, the spatial localization of InGaN is much weaker than that of blue LEDs. Therefore, MQWs excitons of UV LEDs are easily trapped by threading dislocations [22]. Contrastively, a substantial number of threading dislocations in GaN layer for sample D are filtered out. This can be attributed to better crystalline quality and smoother surface morphology of AlN buffer layer [20,22]. The SWs as the strain relief layer are used to intentionally nucleate and expand the V-pit in the luminescent active region shown in the inset of Fig. 3(e). On the one hand, the V-pit can effectively inhibit the nonradiative recombination at the threading dislocations, because it can shield the injected carriers from threading dislocations within the V-pit [23]. On the other hand, the V-pit filled with p-GaN can effectively promote hole injection into the MQWs [24]. Therefore, the IQE and light output power of (LOP) of LED chips with V-pits are increased significantly, and the forward voltage is reduced ultimately.
Fig. 3 The typical XRCs of (a) AlN (0002) and (b) AlN (10-12) for samples A and B. (c) The dependence of the FWHM values of AlN buffer layer for samples A/B on corresponding LED wafers for samples C/D. The cross-sectional TEM images of LED wafers for (d) sample C and (e) sample D.
The surfaces of samples C and D can be observed as shown in Figs. 4(a)-4(b). It can be noted that the surface of sample D reveals crack-free surface, while the surface of sample C shows high-density cracks which are caused by compressive stress relaxation in GaN layer [25]. The GaN layers grown on Si substrates are easy to cause cracks because GaN introduces high tensile stress due to the high coefficient of thermal expansion (CTE) mismatch between GaN and Si of 115%. The tensile stress will cause cracks on the surface of LED wafers which will lead to the failure of LED chips both in manufacturing and working processes [16]. Fortunately, the AlN/AlGaN buffer layers can provide compressive stress to compensate tensile stress caused by CTE mismatch in GaN layers, thereby avoiding the generation of cracks. Based on the mentioned above, we know that there are high-density threading dislocations existing in the GaN layer of sample C. And the projected length of the inclined threading dislocations as a component of the misfit dislocations relaxes the compressive stress in GaN layers [26]. Therefore, the surface of sample C shows high-density cracks, while the surface of sample D reveals crack-free surface because of the better compressive stress management. Figures 4(c)-4(d) compare the room temperature Raman spectroscopy measurements of samples C and D to further investigate the residual stress in GaN layers. The Raman shifts of the GaN E2 (high) phonon peak for samples C and D are 565.8 and 568.5 cm−1, respectively. It is known that the peak of the stress-free GaN E2(high) phonon is 567.5 cm−1 [27]. In this regard, the GaN layers of sample C are in tensile stress, while the GaN layers of sample D are still in compressive stress. These results are consistent with the OM characterization and verify that the high-quality AlN buffer layer plays a crucial role in the stress management of GaN layers grown on Si substrates.
Fig. 4 The optical micrographs of (a) sample C and (b) sample D. (c) The Raman spectra of LED wafers, and (d) the dependence of GaN E2 Raman shift on the structures of AlN buffer layers for samples C and D.
Apart from the crystalline quality of near-UV LED wafers, some additional structural properties were further investigated, as shown in Fig. 5. The clear and sharp satellite peaks and pronounced Pendellӧsung fringes in HRXRD ω-2θ scan can be identified in Fig. 5(a), which reveals that the MQWs of LED wafers have abrupt InGaN/GaN interfaces with the excellent periodicity, as well as the well-controlled composition and thickness uniformity [28]. To further study the strain of MQWs, we have introduced an asymmetric GaN(10-14) reciprocal space map (RSM), as shown in Fig. 5(b). The slightly mis-alignment MOWs peak in terms of the qx coordinate of the main GaN and MQWs peaks indicates the partial relaxation around the InGaN/GaN interfaces in MQWs resulting from the incipient relaxation [11]. Figure 5(c) shows that the active region of sample D LED wafers including 4-periods SWs, 9-periods MQWs and EBL. Furthermore, the cross-sectional TEM image of MQWs confirms the excellent periodicity of the lattice arrangement, despite the slight lattice distortion between each QW period caused by the lattice mismatch between GaN and InGaN, as shown in Fig. 5(d). The results show that the MQWs have excellent structural properties.
Fig. 5 (a) HRXRD ω-2θ scan curve for InGaN/GaN MQWs, (b) GaN(10-14) RSM for LED wafer, (c) cross-sectional TEM image of SWs, MQWs and EBL, and (d) high-magnification TEM image of InGaN/GaN MQWs of sample D.
The near-UV LED wafers were fabricated into vertical-structure LED chips by the standard processes [17]. The EL spectra of sample D LED chips operating at various currents in the range of 10 to 750 mA are shown in Fig. 6(a). It shows a peak wavelength of 395 nm for the near-UV LED chips and the EL wavelength has a slight blue shift as the operating current increases. Figure 6(b) exhibits the L-I-V curves of samples C and D LED chips. The LOP of two samples increases monotonically with increasing current, and is not saturated even at large current. At an operating current of 350 mA, the LOP of samples C and D LED chip is 430 and 550 mW, respectively. In this regard, for the LOP of the sample D LED chips, they reveal an average LOP increase of ~28% compared to the sample C LED chips. Moreover, the higher LOP of sample D LED chips can be attributed to the improvement of IQE because of the better GaN crystalline quality. For near-UV LEDs, the emission efficiency is more susceptible to the dislocation density than the blue and green LEDs. Hence, the reduction of the GaN dislocations density is crucial to enhance the LOP of the near-UV LED [29]. And the forward voltage for samples C and D LED chips is 3.20 and 3.02 V, respectively. From the measured L-I-V curves, the wall-plug efficiency (WPE) and the external quantum efficiency (EQE) of the as-fabricated LED chips were calculated, as shown in Fig. 6(c). The WPE for samples C and D LED chips is 38.4% and 52.0% at a current of 350 mA, corresponding to the EQE of 39.1% and 50.1%, respectively. Furthermore, the peak WPE and EQE of sample D is 53.0% and 52.8% appeared at 550 mA and 710 mA, respectively. The efficiency droop occurs under the current larger than 710 mA. This result shows an effective containment of the efficiency droop effect, which may be attributed to the optimized EBL, low In-composition InGaN/GaN MQWs and the n-GaN layer on Si substrates under tensile stress compared with that on sapphire substrates, reducing the polarization effect on the MQWs [30–32]. Evidently, the performance of the near-UV LED chips on Si substrates implemented in this work is superior to the state-of-the-art data, as described in Table 1.
Fig. 6 (a) EL spectra for sample D LED chips working at different currents from 10 to 750 mA. The inset in (a) is a photograph of the LED chip working at 350 mA. (b) L-I-V curves, (c) WPE-I and EQE-I curves, and (d) I-V curves for samples C and D LED chips.
Table 1. The device properties of near-UV LEDs ever reported
The I-V curves of samples C and D LED chips in the forward-biased region are shown in Fig. 6(d). In the region where the forward bias is less than 2 V, the leakage current of sample C is one order of magnitude larger than that of sample D. The reason of excess leakage current in sample C is that the carrier in depletion regions recombines through the trap levels which may be related to the threading dislocations, because the carrier concentration in the depletion region is almost zero [37]. The I-V curves for samples C and D LED chips in the reverse-bias region are shown in the inset of Fig. 6(d). We can observe that the ratio of the reverse leakage current of sample D to that of sample C is about one order of magnitude difference. The reverse leakage current is caused by open-core screw dislocations [37]. Based on these results, we can conclude that the high crystalline quality of GaN layer is a crucial condition for the fabrication of high-performance near-UV LEDs on Si substrates.
4. Conclusions
To conclude, high-performance 395 nm GaN-based near-UV LEDs have been prepared on Si substrates by designing the structure of AlN buffer layer. By adopting a multi-layer structure with high- and low-V/III ratio alternation technique, high-quality AlN buffer layer with a small FWHM for AlN(0002) of 648 arcsec with a small RMS roughness of 0.11 nm has been obtained. Subsequently, the high crystalline quality of GaN layer on Si substrates was confirmed by low dislocations density shown in TEM images and the small values of FWHMs. Moreover, the near-UV LED wafers exhibit the sharp and abrupt hetero-interfaces of InGaN/GaN MQWs with good periodicity. Furthermore, at an injection current of 350 mA, the as-fabricated 395 nm GaN-based LED chips reveal a high LOP of 550 mW and a small forward voltage of 3.02 V, corresponding to a high WPE and EQE of 52.0% and 50.1%, respectively. About a 20% enhancement of LOP and a one order of magnitude decrease of leakage current have been obtained due to the improvement of GaN crystalline quality. These high-performance near-UV LEDs on Si substrates are of paramount importance in the application of curing, sterilization, efficient white lighting, etc.
Funding
National Natural Science Foundation of China (51702102, 51577070); National Science Fund for Excellent Young Scholars of China (51422203); National Defense Scientific and Technological Innovation Special Zone (17-163-13-ZT-008-029-04); National Natural Science Foundation Major Instrument Special Project of China (51727901); Natural Science Foundation for Doctor Scientific Research Start of Guangdong Province (2017A030310518); China Postdoctoral Science Foundation (2018T110867, 2017M610520); Source fund of the State Key Laboratory of Space Technology of China.
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