1. Introduction

Thin-film lithium niobate (LN) photonic integrated circuits (PICs) have recently emerged as a promising photonics platform for many emerging applications due to their superior electro-optic performance and large second order optical nonlinearity. This is achieved through the recent development of high-confinement waveguides with low propagation loss [1–6], comparable to that of passive material platforms. The desired low loss and nonlinear material properties can readily complement existing platforms such as indium phosphide (InP) and silicon (Si) photonics, where intrinsic second order nonlinearity is lacking. At device level, modulators with ultralow voltage and/or bandwidth beyond 100 GHz have been demonstrated [7–12]. Novel nonlinear optical components including frequency converters and frequency comb generators have also been realized at chip level [13–17]. These high performance, fundamental building blocks have the potential to enable many new applications in optical communication [18,19], microwave photonics [20,21], quantum photonics [22–25], and sensing [26].

A major outstanding challenge is fabricating LN PICs at wafer-scale, i.e. if low optical loss devices can be achieved uniformly over large areas on a wafer with high throughput. Wafer-scale fabrication would enable large-scale and complex electro-optic and nonlinear optical PICs required for applications such as quantum photonics and integrated microwave photonics. In addition, a scalable process would enable a massive reduction of device cost, especially for cost-sensitive applications such as optical communications. Currently, low loss LN PIC demonstrations have only been realized for individual devices and circuits spanning over small individual chip areas. Existing techniques employ serial device patterning techniques such as electron beam (e-beam) lithography [2–5] and/or complex polishing techniques [1,6]. While these approaches are very effective for device prototyping, scaling these fabrication methods could require prohibitively long write times and poses major challenges for device yield.

Optical lithography and direct etching for lithium niobate has been previously investigated but typically results in rough etched sidewalls [27]. Attempts to etch LN with standard fluorine (F) based etching techniques produce lithium fluoride (LiF) byproducts which are non-volatile and impede the etching process. Therefore, etching techniques for these demonstrations are typically physical etching [e.g., Argon (Ar) based]. However, interaction between Ar and photoresist could results in micromasking in the photoresist polymer, which is transferred to the etched sidewalls as roughness, especially for large etching depths. The resulting sidewall roughness increases scattering losses, which ultimately limits optical propagation loss in photoresist masked LN devices.

2. Device fabrication

Here we demonstrate deep-ultraviolet (DUV) optical lithography defined thin-film LN PICs etched on 4-inch and 6-inch wafers with propagation loss averaging 0.27 dB/cm at telecom wavelengths, approaching some of the best chip-scale demonstrations to date [1–6]. To address the photoresist smoothness problem in physical etching processes, we developed and employed a two-step masking technique that involved transfer of a DUV lithography defined polymer mask to a hard mask of silicon dioxide (SiO$_2$) deposited onto the LN thin-film. We transferred the polymer resist pattern to SiO$_2$ using a standard fluorine based dry etching process, and we then etched the LN layer with Ar inductively-coupled plasma (ICP) reactive-ion etching (RIE) etching similar to that of e-beam resist patterned devices [4]. We then used this wafer-scale approach to fabricate a variety of optical devices, including electro-optic modulators, micro-ring resonators, and directional couplers (Fig. 1). While the exposure time of these devices with DUV was less than a minute, exposure with an e-beam process (e.g. using an e-beam current of 10 nA on a 125 kV lithography system) would have required more than 8 days of continuous writing.

 

Fig. 1. Photographs of 6-inch (a) and 4-inch (b) thin-film lithium niobate wafers fabricated using deep-ultraviolet lithography and standard etching processes. (c) SEM image showing typical device sidewall roughness, which is comparable to devices made with e-beam lithography [4].

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The wafer (NanoLN) consisted of a 500 $\mu$m thick silicon handle, a 4.7 $\mu$m thick thermal $\mathrm {SiO}_2$ layer, and a 600 nm thick x-cut LN thin-film (Fig. 2(a)). We first deposited a 650 nm layer of $\mathrm {SiO}_2$ on top of the thin-film LN via plasma enhanced chemical vapor deposition (PECVD), spun 60 nm of anti-reflective coating (ARC) and 600 nm of DUV photoresist (Fig. 2(b)), and then patterned the wafer with a DUV stepper of 248 nm wavelength (Fig. 2(c)). The ARC was etched with standard dry etching with Ar and O$_2$ (Fig. 2(d)), and then the patterned DUV photoresist was transferred into the $\mathrm {SiO}_2$ hard mask using standard $\mathrm {SiO}_2$ dry etching methods in $\mathrm {C}_3\mathrm {F}_8$ chemistry (Fig. 2(e)). We etched LN using reactive ion etching with Ar ions [4] and then removed the photoresist (Fig. 2(f)) and the $\mathrm {SiO}_2$ hard mask (Fig. 2(g)) using hydrofluoric acid, leaving a thin LN slab (typically 200-300 nm, depending on the desired device). The wafer was then cladded by depositing 800 nm of $\mathrm {SiO}_2$ via PECVD (Fig. 2(h)). Figure 1(c) shows the etched sidewall of a LN waveguide fabricated with this process, with sidewall roughness comparable to devices made with e-beam lithography.

 

Fig. 2. Schematic of the fabrication process. On a thin-film LN wafer (a), we deposited a $\mathrm {SiO}_2$ hard mask, then spin-coated anti-reflective coating (ARC) and DUV photoresist (b). After DUV patterning (c) and ARC etching (d), the pattern was transferred into the $\mathrm {SiO}_2$ hard mask (e), and then into the LN layer, leaving a thin slab of LN. The photoresist was stripped (f), and then residual hard mask was removed (g). Finally, the devices were cladded with $\mathrm {SiO}_2$ (h).

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3. Measurement

We analyzed the etched film thickness and measured a standard deviation of 5.9 nm for a 300 nm etch on a 4-inch wafer. We also show that our processing was not the dominant source of film thickness variation. We focus our discussion on a 4-inch wafer here due to our instrument limitation for characterizing 6-inch wafer sizes. We measured the LN film thickness before processing (Fig. 3(a)), and again after etching and mask removal, before the final $\mathrm {SiO}_2$ cladding was deposited (Fig. 3(b)). Because of the relatively large spot size of the white light interferometer used for film thickness measurement (FilMetrics F50-EXR), as well as a roughened rim due to thin-film LN wafer production process, the measurable area on the 4-inch wafer had an 8 mm edge exclusion. From the difference of these two thickness measurements, we extracted the etch depth (Fig. 3(c)), which shows that our processing did not introduce significant additional thickness variation. Moreover, most of the film thickness variation after etching was located near the edge of the wafer. Excluding 6 mm further from the edge of the measurable area (within dotted area of Fig. 3(c)), the film thickness standard deviation was only 3.2 nm. The variation at the edge was most likely attributed to a combination of initial thickness variation and reduced chemical exposure at the edge of the wafer due to wafer handling during processing. This can be improved in the future as thin-film LN wafer production techniques advance in wafer uniformity and as wafer handling becomes automated.

 

Fig. 3. Measurement of LN thickness uniformity of a 4-inch wafer (a) before device processing and (b) after device processing. (c) Map of the etch depth, which is the difference between (a) and (b). The etch depth is very uniform, with standard deviations of 5.9 nm across the wafer and of 3.2 nm within the dotted circle, 6 mm from the edge of the measurable wafer area. Note that the etch depth variation is comparable to the thickness variation of the initial wafer, demonstrating that the processing was not a dominant source of nonuniformity. Overlaid on the etch depth (c) are measured propagation loss values (in units of dB/cm) from a similarly processed wafer, showing achieved propagation losses between 0.21 dB/cm and 0.36 dB/cm, with an average of 0.27 dB/cm.

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We measured an average propagation loss of 0.27 dB/cm in the etched optical waveguides across a 4-inch wafer, with a standard deviation of 0.05 dB/cm. In order to characterize the optical propagation loss, we included optical micro-ring resonators in the 22 mm by 22 mm DUV reticle that was stepped across a wafer. We coupled light from a tunable laser source into and out of the grating-coupled resonators using a vertical fiber array and measured the output power on a photodiode, obtaining the device transmission spectra for devices at various locations on the wafer (Fig. 4). The laser wavelength range of 1590 to 1600 nm was chosen to overlap with the peak of the grating coupler bandwidth, which was designed to overlap with our laser source. In order to avoid possible artificial linewidth narrowing due to the photorefractive effect [28], we reduced optical power (typically $< 20$ $\mu$W estimated in the device) and scanned the laser from long to short wavelength, so that the laser scan would follow the power dependent photorefractive blue shift in wavelength. Thus our linewidth measurement is a conservative upper bound estimate on the optical propagation loss. We confirmed the minimization of photorefractive effect by producing spectra with identical linewidths for both red and blue laser scan directions. Note that at these low power levels, red-shifting thermo-optic effect is not measurable. The lowest loss was measured on micro-ring resonators with etch depth of 400 nm, bending radius of 80 $\mu$m, and waveguide width of 2.0 $\mu$m near the center of the wafer, which had an intrinsic quality factor of 1.8 million, corresponding to a propagation loss of 0.21 dB/cm. We overlaid resonance spectra from each reticle exposure on the wafer (Fig. 4(b)), and they are consistent in linewidth, although the minimum transmission varies because of inherent sensitivity to resonator loading in the resonator coupling gap due to fabrication variation. We further characterized propagation loss uniformity across the full wafer (Fig. 3(c)) and measured a maximum value of 0.36 dB/cm at the edge of the wafer, and an average of 0.27 dB/cm, with standard deviation of 0.05 dB/cm.

 

Fig. 4. (a) Typical resonance spectrum of a grating-coupled micro-ring resonator. We measure from 1590 to 1600 nm wavelength to overlap with the peak of the grating-coupler bandwidth for these devices. (b) Micro-ring resonance spectra from different locations on the wafer (see Fig. 3(c) for measurement locations), after renormalizing and centering around the resonant wavelength. Each resonance is from a different reticle exposure across the wafer. The minimum transmission varies because the waveguide-ring coupling is sensitive to fabrication, which changes the loading condition of the resonator. However, note that the linewidths of the resonances are consistent with each other, which suggests that the fabrication is uniform across the wafer.

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4. Discussion

At a nominal propagation loss value of $< 0.3$ dB/cm, many applications including electro-optic modulators and frequency converters can now be produced economically and at scale. There is still tremendous interest to further reduce the loss at or below what has been achieved at the single device level. The optical propagation loss achieved in this demonstration was likely limited by etching roughness [4,27]. The optical loss can be expected to improve further by developing a smoother hard mask transfer process, which has not been optimized in this study and has been shown to produce waveguide loss $< 1$dB/m [29]. Achieving such level of losses would enable a new library of optical components that are not currently accessible, such as near-lossless cascaded electro-optic devices and/or long on-chip optical delay lines exceeding meters of lengths.

Our demonstration has also opened up new opportunities for high throughput wafer-scale testing capabilities that dramatically sped up the development of silicon photonics [30] using probes and grating couplers [31]. This work (Figs. 1(a),1(b)) has also shown that metalization processes, as expected, are insensitive to the change on the optical waveguide layer. This enables the possibility of ultrahigh speed electro-optic devices characterized at wafer level in the near future, which is key to shortening the development cycle of LN PICs.

5. Conclusion

Our results show that LN PICs with low optical loss can be fabricated with good uniformity on wafer-scale with high throughput. While the optical loss and film thickness variation still have room for improvement compared to the material limit of LN and uniformity achieved on SOI respectively, our work serves as a first step to enable large-scale, complex, and low loss electro-optic and nonlinear PICs with high yield. This can boost development in emerging large-scale PIC applications such as quantum photonics and photonic neural networks [32]. Moreover, the high throughput fabrication process can dramatically reduce device cost, enabling LN PIC technology to perform in a broader range of cost-sensitive applications in data- and telecommunications, sensing, and microwave photonics. Beyond monolithic LN PICs, the standard lithium niobate on insulator (LNOI) structure and the excellent passive optical performance may spur interests in achieving heterogeneously integrated optical systems on thin-film LN with laser and detector integration to achieve best-in-class performance.