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Abstract
A better lateral current confinement is essentially important for GaN-based vertical-cavity-surface-emitting lasers (VCSELs) to achieve lasing condition. Therefore, a buried insulator aperture is adopted. However, according to our results, we find that the current cannot be effectively laterally confined if the insulator layer is not properly selected, and this is because of the unique feature for GaN-based VCSELs grown on insulating substrates with both p-electrode and n-electrode on the same side. Our results indicate that the origin for the current confinement arises from lateral energy band bending in the p-GaN layer rather than the electrical resistivity for the buried insulator. The lateral energy band in the p-GaN layer can be more flattened by using a buried insulator with a properly larger dielectric constant. Thus, less bias can be consumed by the buried insulator, enabling better lateral current confinement. On the other hand, the bias consumption by the buried insulator is also affected by the insulator thickness, and we propose to properly decrease the insulator layer thickness for reducing the bias consumption therein and achieving better lateral current confinement. The improved lateral current confinement will correspondingly enhance the lasing power. Thanks to the enhanced lateral current confinement, the 3dB frequency will also be increased if proper buried insulators are adopted.
© 2020 Optical Society of America under the terms of the OSA Open Access Publishing Agreement
1. Introduction
Vertical-cavity-surface-emitting lasers (VCSELs) have gained a growing interest in many optical applications which are considered to show various superiorities over edge emitting lasers, e.g., low threshold current, high slope efficiency, small beam divergence, and easy-process for mounting and packaging [1]. Therefore, VCSELs have been required in applications such as laser displays, optical-storage systems, high-resolution printing, optical communication and optical data links [2–5]. In the meanwhile, wafer level testing is doable due to the surface emission feature, which therefore decreases the fabrication cost for quick testing. Among the candidates for making VCSELs, GaN-based compound semiconductors are expected to serve as the active material to achieve the spectral illumination from deep-ultraviolet to green light. However, several obstacles have hindered the further development of GaN-based VCSELs. One of the key problems is the difficulty to fabricate high-quality distributed Bragg reflectors (DBRs) with high reflectivity. Therefore, in order to increase the refractive index contrast between high-index layer and the low-index layer, AlN/GaN and AlInN/GaN DBRs are adopted [6–8]. Besides the challenging epitaxial growth process, the non-conductivity property for AlN/GaN DBRs allows no freedom in making vertical VCSELs like arsenide VCSELs. Therefore, GaN-based VCSELs employ the lateral current injection scheme, which indicates the importance for confining carriers underneath the cavity. Over the past decades, significant progress on current-injected GaN-based VCSELs has been made [9–14]. However, it is of particularly important that the poor lateral current confinement still limits the lasing power for GaN-based VCSELs. For improving the lateral current confinement capability, numerous techniques have been ever attempted. A straightforward method is to make deep mesa by exposing multiple quantum wells (MQW), but the formation of surface states on MQW sidewalls can provide a tremendous number of nonradiative recombination centers which will significantly reduce the lasing power [15]. To avoid the damaged MQWs, GaN-based VCSELs with tunnel-junctions can be utilized and show better lateral current confinement [16,17]. Nevertheless, the tunnel-junction requires very heavily Mg-doped GaN layer, which will be extremely challenging for p-GaN layer. On the one hand, the Mg ionization efficiency is as low as 1% for GaN at room temperature, and on the other hand, the growth temperature for p+-GaN layer cannot be higher than 1000 °C in case of the indium desorption from MQWs, As a result, the low growth temperature for the p+-GaN layer further decreases the Mg doping efficiency [18–20]. Currently, most GaN-based VCSELs adopt buried insulators underneath the p-electrode to form apertures at the current stage. However, VCSELs possess insulating AlN/GaN DBRs, and therefore both the p-electrode and n-electrode are fabricated on the same side, which makes the current flow path different from that for GaAs VCSELs, such that the current tends to flow out of the cavity region in spite of the usage of buried insulators.
For better illustrating the current flow scheme for GaN-based VCSELs, we show the simplified current flow paths in Fig. 1(a). We define J1 and J2 as the current in the aperture and below the buried insulator. We also define Rito, Rp, RMQW, Rn and Rx as the resistance values for ITO, p-GaN layer, MQWs, n-GaN layer and the variable resistance that is controlled by the buried insulator, respectively. The ratio between J1 and J2 can be calculated by using Eq. (1) as follows:
Fig. 1. (a) Schematic diagram for GaN based VCSEL structure and the simplified equivalent circuit with lateral current-injection scheme, (b) generation mechanism for the Rx.
2. Device structure and physical model
For proving our idea, we design the VCSEL structure in Fig. 2(a) according to the previous report [21]. The calculated output power of our reference device is in the same range as the actual device output. The studied VCSEL has the 7-λ cavity that is sandwiched by 29 periods of bottom AlN/GaN DBR and 10 periods of top Ta2O5/SiO2 dielectric DBR. The cavity composes of an 880 nm-thick n-GaN electron injection layer, 5 pairs of 3 nm In0.21Ga0.79N/ 4nm GaN multiple quantum wells, a 20 nm thick p-type Al0.10Ga0.90N electron blocking layer (p-EBL) and a 240 nm thick p-type GaN hole injection layer. The VCSEL has the circular aperture with 8 µm in diameter, and the periphery for the aperture is surrounded by a 20 nm thick insulator layer. 20 nm indium tin oxide (ITO) layer is served as the current spreading layer.
Fig. 2. (a) Schematic for the studied VCSEL device and (b) profiles of standing wave and refractive index for the structure.
The investigations are conducted by using PICS3D [22], which is able to solve current continuity equations, Poisson equations and Schrödinger equations with proper boundary conditions. Besides, we also consider Auger recombination by setting the Auger recombination coefficient to 1.4×10−43 m6 s−1 [23]. We define the Shockley-Read-Hall (SRH) lifetime of 1×10−8 s to account for the recombination taking place at defects [23]. In the meantime, we also include the polarization induced charges at the polarization-mismatched interfaces for the [0001] oriented VCSEL structure. The polarization charge density can be calculated by using the method reported in Ref. [24]. Furthermore, we empirically set the polarization level to 40%, meaning that 60% of the theoretical polarization induced charges are released by producing dislocations due to the strain relaxation during the epitaxial growth [25,26]. The band-offset ratio that is defined as the ratio between the conduction-band offset and the valence-band offset for InGaN/InGaN quantum wells is set to 0.70/0.30 [27]. Other parameters on nitride-based semiconductors can be found elsewhere [28]. The optical absorption for ITO is also considered in our model [29]. The average optical back loss for the p-GaN layer, the p-EBL, the MQWs and the n-GaN layer is all set to 1000 m−1 so that we are able to reproduce the experimental results in Ref. [21]. By using our physical models, we calculate and get the spatial distribution for the standing wave and the refractive index profile as shown in Fig. 2(b), and we can find that the antinode and node are precisely located in the MQWs and ITO respectively, representing the reasonable device design is made in this work.
3. Results and discussions
We firstly design Devices 1 to 7 as shown in Table 1, for which the relative dielectric constants for the buried insulators are set to 3.9, 7.5, 10, 15, 20, 25 and 26, respectively. Note, the relative dielectric constants of 3.9, 7.5, 25 and 26 well represent the insulators of SiO2, SiN, HfO2 and Ta2O5, respectively. The lasing power and the forward voltage in terms of the injection current for Devices 1 to 7 are presented in Fig. 3. The inset of Fig. 3 also demonstrates the lasing power as a function of the dielectric constant at the current of 30 mA, which shows that, compared with Device 1, Device 7 increases the lasing power approximately by 7%. The inset current-power characteristics for Fig. 3 also indicate that the threshold current slightly decrease as the relative dielectric constant for the buried insulator increases, e.g., Device 7. However, as the injection current exceeds 15 mA, the forward voltage gets increased from Devices 1 to 7, which reflects a larger J1/J2, such that a reduced cross-section area for the current injection may increase the series resistance. More discussions will be made subsequently.
Fig. 3. Lasing power and forward voltage in terms of the injection current for Devices 1 to 7. Insets show the zoom-in current-voltage curves around the threshold current and the lasing power in terms of the dielectric constant at the current of 30 mA.
Table 1. VCSELs having different dielectric constants for buried insulators.
As has been mentioned earlier, the lasing power is strongly associated with the lateral current confinement, while the lateral current distribution is affected by the energy band alignment. We then show the lateral energy band profiles in Fig. 4(a) for Devices 1 to 7. Here, Φb is defined as the energy barrier height in the valence band according to Fig. 4(a). We can get that Φb decreases as the relative dielectric constant increases. Detailed information regarding the relationship between the relative dielectric constant and the energy barrier height can be found in the inset for Fig. 4(a). Insightful observations into Fig. 4(a) further show that, when SiO2 is adopted for Device 1, the valence band profile gradient is smaller than others, which is not beneficial to more effectively confine carriers in the aperture. We also show the vertical electric field profiles under the insulator in Fig. 4(b). We get that the electric field intensity in the SiO2 insulator is the strongest, which is ascribed to the smallest dielectric constant. The very large electric field intensity can consume more bias, and as a result, the rest bias that is shared by the p-GaN layer underneath the SiO2 insulator becomes smaller than that in the aperture region. The electric field profiles in Fig. 4(b) can further interpret that a small Φb is enabled by using buried insulator with large dielectric constant.
Fig. 4. (a) Lateral valence band diagrams along the marked position for the schematic VCSEL at the current of 30 mA; Φb in terms of the relative dielectric constant is shown in the inset, (b) vertical electric field distribution along the marked position for the schematic VCSEL.
According to our previous analysis, Φb directly affects Rx. To facilitate the better lateral current confinement, we prefer a smaller -Rx (Rx < 0). Investigations into Figs. 4(a) and 4(b) reflect that a small -Rx can be obtained by reducing the Φb. Hence, to better demonstrate our point, we further calculate and present the lateral hole concentration profiles for Devices 1 to 7 in Fig. 5(a). It shows the very poor lateral current confinement for Device 1 having SiO2 as the buried insulator, and the enhanced lateral current confinement capability can be obtained as the dielectric constant for the buried insulator increases, e.g., Device 7. Our results here prove that the lateral current confinement for GaN-based VCSELs with lateral current injection scheme is not enabled by the electrical resistive feature for the buried insulators. Instead, the lateral current confinement is obtained by the electrical potential fluctuation. To further elucidate our point, we present the vertical hole concentration profile underneath the buried insulator as shown in Fig. 5(b). As the relative dielectric constant increases, the hole depletion effect becomes stronger such that the hole concentration underneath the buried insulator decreases, which agrees well with the demonstrated electric field profiles in Fig. 4(b). This is very helpful to get the enhanced lateral current confinement, which is consistent with the observations in Fig. 5(a). It is interesting to see the hole accumulation at the p-GaN/SiO2 interface in Fig. 5(a), which is because of the polarization induced electric field therein. When SiO2 is adopted, the largest electric field is supported by the SiO2 layer, which gives rise to the reduced electric field intensity in the p-GaN layer. Therefore, the polarization induced electric field at the p-GaN/SiO2 interface cannot be compensated, which is not beneficial to enhance lateral current confinement. Here, we can speculate that the lateral current leakage will become even more significant if the aperture size further decreases. Therefore, we believe that the increase for the lasing power can exceed 7% if the aperture diameter is smaller than 8 µm.
Fig. 5. (a) Lateral hole concentration, (b) vertical hole concentration along the marked positions for the inset schematic VCSEL at the current of 30 mA, respectively.
Besides the dielectric constant, the bias consumption by the buried insulator is also influenced by the layer thickness, such that more bias can be supported if the buried insulator becomes thicker [30]. In this section, we set the relative dielectric constant of 26 for the buried insulator, and the insulator layer thickness is varied, i.e., values of 20 nm, 40 nm, 60 nm, 80 nm, 100 nm, and 120 nm are set for Device A to Device F, respectively as depicted in Table 2.
Table 2. Devices A to F with different buried insulator thicknesses.
We then compute and demonstrate the lasing power and the forward bias as a function of the injection current for Devices A to F in Fig. 6. We can get that as the insulator thickness increases, the lasing power becomes weak. We believe this makes sense according to our previous discussions. When the insulator becomes thick, more bias will be supported therein. This surely will decrease the bias that is shared by the p-GaN layer, and therefore -Rx (Rx < 0) is increased, and the current can be poorly laterally confined. Figure 6 also illustrates that the forward voltage will be less affected by the insulator thickness, which is different from our previous conclusion for Fig. 3. We have proposed that the better lateral current confinement can cause serious hole depletion underneath the insulator, which may sacrifice the forward voltage. The different observations are obtained here that the slightly increased forward voltage is obtained when the device has the poor current confinement. It is worth noting that the situation for Device A to F is different from that for Devices 1 to 6. Devices 1 to 6 only change the dielectric constant without varying the architectural structure for the investigated VCSELs, while the architectural stack is changed for Devices A to F because of the different thicknesses for the buried insulator. A thick insulator can reduce the cross-sectional area for J2, thus increasing the value of Rp3 [see Fig. 1(a)] and eventually compromising the forward voltage. The current-voltage characteristics in Fig. 6 further proves that the electric resistivity for the buried insulator is not the essential parameter that generates excellent lateral current confinement for GaN-based VCSELs.
Fig. 6. Lasing power and forward voltage in terms of the injection current for Devices A to F. Inset figure shows the forward voltage in terms of the buried insulator thickness at the current of 25 mA.
To better interpret the observed relationship between the lasing power and the injection current for Device A to F, we show the lateral valence band profiles in Fig. 7(a) which position is fixed to be 10 nm away from insulator. We can also observe the energy barriers, which are well ascribed to the shared bias by the buried insulator. The inset for Fig. 7(a) depicts the energy band barriers for the lateral energy bands, which shows that the smallest energy band barrier can be obtained when the insulator becomes thin, e.g., 20 nm in this case. The energy barriers also decrease as the buried insulator thickness exceeds 60 nm, and we believe this is due to the coupled effect by the polarization electric field at the p-EBL/p-GaN interface when the insulator layer becomes thick. We also present the vertical electric field profiles in Fig. 7(b). When the insulator thickness is 20 nm, less bias will be shared therein, and hence the stronger electric field in the p-GaN underneath the buried insulator can compensate the polarization induced electric field at the p-GaN/buried insulator interface. However, as more bias is supported by the thickened insulator, the polarization induced electric field at the p-GaN/ buried insulator interface will be less screened, and we correspondingly observe the strong electric field intensity at the p-GaN/ buried insulator interfaces for Device D, E and F in Fig. 7(b). Our conclusion here are consistent with the discussions for Fig. 5(a) previously, such that unscreened polarization electric field at the insulator/p-GaN interface directly influences the lateral current leakage profiles.
Fig. 7. (a) Lateral valence band profiles, (b) vertical electric field profiles along the marked positions for the inset schematic VCSEL at the current of 25 mA, respectively.
Hence, Fig. 8(a) then demonstrates the vertical hole concentration profiles underneath the insulator. Agreeing well with Fig. 7(b), the polarization induced electric field at the p-GaN/buried insulator interface causes very strong hole accumulation when the insulator layer becomes thicker, e.g., 120 nm for Device F. The hole depletion can be found at the p-GaN/ buried insulator interface when the insulator is thin, e.g., 20 nm for Device A. We then also show the lateral hole concentration profiles in the p-GaN layer for the investigated devices in Fig. 8(b), and we can see that the lateral current leakage becomes strong with the increasing hole accumulation level at the insulator/p-GaN interface, e.g., Device F. Therefore, Device F shows the smallest lasing power and the largest threshold current among Devices A to F in Fig. 6. The conclusions here further illustrate that a proper thickness for the insulator layer can effectively improve the lateral current confinement.
Fig. 8. (a) Vertical and (b) lateral hole concentration profiles along the marked positions for VCSELs with insulator layers of different thickness at the current of 25 mA, respectively.
Up to now, we have realized that a thin insulator with high dielectric constant will be able to better confine the current and enhance the lasing power. Nevertheless, this will increase the pad capacitance for VCSELs and suppress the modulation response capability if the laser diodes are designed for communication. Therefore, it is necessary for us to show the impact of the different insulators on the 3dB frequency bandwidth. We then selectively choose Devices 1, 7, B and F. The relative dielectric constants of the insulators are 3.9 and 26 for Devices 1 and 7, respectively while the insulator thickness is fixed to 20 nm for both devices. The insulator layer thicknesses for Devices B and F are set to 40 nm and 120 nm, respectively while the relative dielectric constant for the buried insulator layer is set to 26 for both devices. The calculated frequency response characteristics for Devices 1, 7, B and F are presented in Figs. 9(a), 9(b), 9(c) and 9(d), respectively. If we compare Figs. 9(a) and 9(b), we find that, as the injection current increases, the 3dB frequencies for Devices 1 and 7 are increased from 4.2 GHz and 4.3 GHz to 8.9 GHz and 9.3 GHz, respectively. The same conclusion can also be made for Figs. 9(c) and 9(d). Then, we get that the 3dB frequency can be increased by increasing the stimulated radiative recombination rate, and this is because of the reduced differential carrier lifetime. On the other hand, we also find that the 3dB frequency for Device 7 is larger than that for Device 1 especially when the injection current becomes high, e.g., at the current level 20 mA in this case. The same conclusion is also obtained for Devices B and F, such that the 3dB frequency for Device F is even bigger than that for Device B, e.g., the 3dB frequency numbers are 2 GHz and 4 GHz, 6.4 GHz and 8.4 GHz at the current of 8 mA and 20 mA, respectively. Therefore, a thin insulator with large dielectric constant can increase the modulation response when the differential carrier lifetime becomes short by enhancing the stimulated radiative recombination rate. We believe that the buried insulator can be designed in the way of better confining the lateral current while maintaining a large 3dB frequency.
Fig. 9. Calculated small-signal modulation response for VCSEL Devices 1 and 7 at the current of (a) 8 mA and (b) 20 mA; calculated small-signal modulation response for VCSEL Devices B and F at current of (c) 8 mA and (d) 20 mA.
4. Conclusion
In summary, this work has proposed and shown the origin for the lateral current confinement for GaN-based VCSELs that have lateral current injection scheme. We find that the electrically resistive feature for the buried insulator is not the essential parameter that controls the lateral current distribution. Instead, the current can be laterally confined into the aperture thanks to the lateral energy barriers in the p-GaN layer. This energy barrier can be tuned by manipulating the voltage drop in the buried insulator, and a small voltage drop in the buried insulator is required, which guarantees that the p-GaN layer underneath the buried insulator can share more electrical potential. Then, a smaller -Rx (Rx < 0) can be obtained that more favors the lateral current confinement in the aperture. To achieve that goal, we propose to use properly thin buried insulators with large dielectric constant, and by doing so, more electrical potential can be supported by the p-GaN layer underneath the buried insulator, which helps to reduce -Rx (Rx < 0). Our results show the maximum lasing power enhancement is ∼7% when the relative dielectric constant for the buried insulator increases to 26 from 3.9. As indicated by our discussions, we believe that the lasing power enhancement and the lateral current confinement can be more significant if the aperture size for GaN-based VCSELs further decreases. Our studies also reveal that the 3dB frequency for VCSELs will be improved as long as the proper design for the buried insulators is conducted. Therefore, we strongly believe that the findings in this work introduce the additional physical understanding for GaN-based VCSELs. This work is very useful for the community of optical semiconductor devices.
Funding
Natural Science Foundation of Hebei Province (No. F2017202026); Program for Top 100 Innovative Talents in Colleges and Universities of Hebei Province (No. SLRC2017032); Program for 100-Talent-Plan of Hebei Province (Project No. E2016100010); Technology Foundation for Selected Overseas Scholar, Ministry of Human Resources and Social Security (CG2016008001).
Disclosures
The authors declare no conflicts of interest.
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