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Abstract
In this paper we present a thorough simulation-based analysis for the design of multi-step couplers bridging seamlessly plasmonic barium titanate oxide (BTO) ferroelectric phase shifters and thick silicon nitride (Si3N4) waveguides for the O-band. The targeted plasmonic waveguides are a hybrid plasmonic waveguide (HPW) providing low propagation losses and a plasmonic metal-insulator-metal (MIM) slot waveguide offering a high confinement factor for high modulation efficiency. The proposed plasmonic platforms are formed by Copper (Cu) providing CMOS compatibility. The analysis is based on 2D-FD eigenvalue and 3D-FDTD numerical simulations targeting to identify the optimum geometries ensuring the lowest coupling losses, calculated as 1.75dB for the HPW geometry and 1.29dB for the MIM configuration. The corresponding confinement factors are 31.39% and 56.2% for the HPW and MIM waveguides, respectively.
© 2022 Optica Publishing Group under the terms of the Optica Open Access Publishing Agreement
1. Introduction
Silicon nitride (Si3N4) is gaining ground over the last few years as one of the most common materials found in a CMOS fab promising a wide operation band, ultra-low propagation losses, lower than those of Si-photonic waveguides, and high fabrication tolerances [1]. For this purpose, exploiting hybrid, heterogeneous, or monolithic co-integration strategies, Si3N4 has enabled seamless light transition between passive PICs and lasers, amplifiers and/or photodetectors [2–5] both in the O- and C-band. Moreover, a plethora of studies have focused on the realization of modulators on Si3N4, via the co-integration of various materials featuring electro optic properties, such as graphene [6,7], silicon [8], lithium niobate [9], and ferroelectric lead zirconate titanate [10]. Towards this direction, ferroelectric barium titanate oxide (BaTiO3 or BTO) exhibits a strong electro-optic coefficient, CMOS compatibility and capability to withstand high temperature. For this reason, it is currently the most promising approach for the demonstration of very efficient phase shifters that can be post processed for further packaging and assembly with electronic ICs [11,12].
In parallel, plasmonic modulators have emerged as a key-enabling technology offering optical devices with ultra-low footprint. A variety of plasmonic waveguides have been presented so far, such as Dielectric-Loaded Surface-Plasmon Waveguides (DLSPW) [13], slot MIM structures [14,15] and hybrid plasmonic waveguides (HPW) [16,17]. The last two offer gaps that can support modes with high power confinement, rendering them an excellent solution for phase modulation [18]. Following this approach, the electro-optic polymer organic material in plasmonic slot phase-shifter configurations is the one with the highest performance reported so far in terms of achievable rates and power consumption [19]. However, temperature stability of the poled organic materials restricts the application range of this technology. Plasmonic ferroelectric modulators employing solid-state lithium niobate [20,21] and BTO [22–24], with their promising modulation efficiency, tolerance to high temperatures, and compact dimensions, have recently emerged as a more viable solution for compatibility with back end of the line (BEOL) processes [25]. Nevertheless, efforts targeting the integration of Si3N4 photonic waveguides with CMOS plasmonic BTO-based phase modulators are still missing.
Towards this direction, the co-integration of Si3N4 waveguides with BTO-ferroelectric plasmonic phase shifters requires coupling configurations that will efficiently transfer the light from the Si3N4 waveguide to HPW and MIM waveguides. Previous demonstrations of such configurations focused on the design of coupling schemes for light transfer from Si-photonic waveguides to HPW, DLSPW, and MIM plasmonic waveguides based on noble metals [26–29]. Although this approach exhibits the best performance in terms of propagation losses in the plasmonic waveguide, it is incompatible with the CMOS process, raising a big concern about its suitability for production in mass scale. For this reason, devices based on alternative plasmonic metals such as TiN, Al or Cu have been investigated intensively during the last few years [30], with the plasmon propagation losses of Cu shown in [31] to approach those of Au.
Regarding CMOS plasmo-photonic couplers, in [32], a modulator based on the co-integration of silicon with transparent conducting oxides and TiN plasmonic metals was reported with the plasmonic-to-photonic transducer yielding simulated losses of 0.7 dB. In [33] a coupling interface based on Si waveguides and Al-based composite hybrid plasmonic waveguide (CHPW) ITO-based amplitude modulators was experimentally demonstrated with measured losses as low as 1.14dB, while simulations indicated 1.61dB. Nevertheless, the above works, are failing to modulate the real part of the refractive index that is necessary for advanced modulation formats and do not solve the problem of incorporating a plasmonic modulator on the Si3N4 photonic platform. ITO based plasmonic phase shifters on the other hand [34] are demonstrated so far with only a few tens of GHz operational bandwidth, much lower than that of plasmonic ferroelectric modulators. Going now to plasmo-photonic couplers for non-active devices, the integration of Si photonic and Cu-based air-filled slot waveguides was presented in [35] with the simulated and experimental coupling losses being close to 1.55dB and a metal-silicon gap of only 30 nm rendering the whole coupler sensitive to variations. In [36] the induced experimental coupling losses from a Si3N4 photonic waveguide to a Cu-based plasmonic one were lower than 2.84dB with 1.9 dB simulated coupling losses. Finally, novel efficient coupling configurations for coupling from Si3N4 to open-cladded Cu-based slot waveguides have exhibited simulated losses less than 1.15dB [37]. Nonetheless, all the above devices do not incorporate an electro-optic material in the gap, prohibiting any modulation of the transmitted wave.
In this work, we present a thorough analysis for the design of O-band coupling configurations from Si3N4 waveguides to Cu/BTO-based HPW and MIM plasmonic phase shifters. The gap is filled in both waveguides by a ferroelectric BTO material featuring an Electro-Optic coefficient as high as 1000 pm/V [22]. The optimum coupling configuration for the HPW geometry is shown to exhibit total transition losses lower than 1.75dB, while for the MIM case the total transition losses are lower than 1.29dB at the expense of higher propagation losses, being 0.5 dB/µm and 0.78 dB/µm respectively. Finally, the corresponding light confinement factor in the plasmonic waveguides is 31.5% for the HPW with 20 nm thick gaps and 56.2% for the MIM waveguides with 100 nm wide slots. For both phase shifter configurations, a fabrication tolerance analysis reports the degradation of the coupling efficiency from the optimum structures for varying geometrical parameters, investigating up to a 5% thickness variation from the targeted value. Additionally, increasing lateral misalignment values at the directional and adiabatic coupling steps of each interface configuration were explored. The analysis showcased below is expected to lighten the path towards CMOS compatible, low insertion loss, ultra-compact and low-power CMOS plasmonic phase modulators on Si3N4 in the O-band.
This is the first work to the best of our knowledge that is relying on the utilization of a multi-step and multi-layer technology [8], [41–43] to seamlessly couple light from a Si3N4 waveguide to a CMOS plasmonic MIM slot or HPW structure, for the demonstration of plasmonic active devices. The works presented so far in the literature and summarized in Table 1 at Section 5 of the manuscript lack at least one of the following properties: operation in the O-band, employment of CMOS compatible Cu metal for the plasmonic waveguide, incorporation of electro-optic materials for efficient phase-shifting in the plasmonic waveguide or reliance on low loss Si3N4 platform. The rationale behind aiming at this wavelength band is related to the high temperature tolerance of the whole waveguide geometry rendering this technology as the ideal optical engine for ultra-short reach (XSR) co-packaged optics, targeting Intra-Data-Center applications. Also, the fact that plasmonic modulators can be driven with sub-volt voltages [44] at rates higher than 100Gbaud, eliminates the need for electrical amplifiers between the ASIC and the modulators, reducing the total power consumption of the package even more. Furthermore, their ultra-low footprint, removes the requirement for fan out of the high-speed signals coming out of the ASIC’s pins, saving space, and minimizing propagation losses.
Table 1. Comparison of the presented Si3N4-to-(Cu-Plasmonic) CMOS Plasmo-Photonic Waveguide Coupling Interfaces with the State of the Art (Sim. Simulated, Exp. Experimental)
The organization of the rest of the paper is the following: Section 2 presents the overall multi-step coupling concept from Si3N4 to Cu/BTO geometries. Section 3 focuses on the design of interfaces for efficient light transfer to HPW phase shifters, while Section 4 investigates coupling schemes for light transition to the MIM type of waveguides. Section 5 compares the coupling interfaces of this paper with other CMOS-compatible interfaces found in the literature. Both sections are completed by a detailed tolerance analysis for the coupling devices to a variety of critical design parameters. Section 6 concludes the paper with a summary of the obtained outcomes.
2. Overall concept for coupling between Si3N4 photonic and Cu/BTO-based plasmonic modulators
For the co-integration of Si3N4 waveguides with BTO-based CMOS plasmonic modulators, two discrete novel coupling structures have been designed and are proposed herein. The first one focuses on light coupling from an 800 × 800 nm2 Si3N4 waveguide to a hybrid plasmonic waveguide (HPW) structure, whereas the second one on coupling to a plasmonic slot (Metal Insulator Metal-MIM) waveguide. In both cases, a proper 220 nm thick aSi interposer waveguide is incorporated to facilitate the phase matching condition between the plasmonic structures and the Si3N4 platform. In the HPW case that supports mainly TM plasmonic modes, the aSi layer is an integrated part of the phase shifter, as it provides contact for the RF signal injection and resides at the bottom of the waveguide. For the plasmonic MIM slot structures, the aSi is only utilized as a photonic interposer and the supported plasmonic waveguide modes are TE only, due to the slot symmetry. Figure 1(a) illustrates the envisaged Si3N4-to-aSi-to-HPW coupler, consisting of an initial adiabatic coupling step from Si3N4-to-aSi/BTO, a transition taper to the aSi/BTO waveguide and a final end-fire coupling step from the aSi/BTO to the HPW waveguide. On the other side, Fig. 1(b) depicts the envisaged Si3N4-to-aSi-to-MIM coupler where, the aSi waveguide is solely employed as a vertical interposer efficiently transferring light to the final MIM plasmonic waveguide. This coupler consists of an initial Si3N4-to-aSi adiabatic coupling step and an aSi-to-MIM directional coupling section.
Fig. 1. (a) 3D-depiction of the multi-step coupler between a Si3N4 and an HPW plasmonic waveguide, and (b) between a Si3N4 and a plasmonic MIM slot waveguide.
To analyze the optical interface of Si3N4 waveguides with the proposed CMOS plasmonic MIM and HPW waveguides, a 2D-Finite Difference (FD) eigenvalue problem was initially solved for the Si3N4 waveguide. Figure 2(a) presents the cross-sectional geometry of the Si3N4 waveguide with 800nm thickness. At 800nm width, the waveguide supports a fundamental TE-mode with a real part Re{neff} = 1.775719 and a fundamental TM-mode exhibiting Re{neff} = 1.775721. Figure 2(b) illustrates the effective index variation versus the Si3N4 width for the TE and TM supported modes. It is apparent that higher-order modes are feasible for widths larger than 900nm, while the effective indices of the fundamental TE- and TM-modes become lower for smaller width values. PML boundary conditions were applied at the edges of the computational window to eliminate any non-physical modes.
Fig. 2. (a) Cross-sectional geometry on the yz-plane of the simulated Si3N4 waveguide structure, (b) Parametric eigenmode analysis results for a variety of Si3N4 waveguide widths.
The coupling analysis was initially focused on the HPW waveguide with Fig. 3(a) presenting the cross section of the yz-plane. The BTO layer providing the EO phase shift has a thickness of 20 nm and the Cu thin film on top is 100 nm. Higher BTO thicknesses could also be an option, but then there is a trade-off between higher modulation efficiency and lower speed emerging from the higher capacitance of the HPW. The BTO is sandwiched between a plasmonic metal on top with a width of 500 nm and a 220nm-thick aSi layer below that is doped. The final cross-section of the plasmonic waveguide features the same aSi layer with a larger width to facilitate electrode formation for voltage application at the EO plasmonic phase shifter. The refractive index of BTO is derived from [12,39], while the refractive index of Cu is obtained from ellipsometry results of [31]. The doped aSi has a refractive index with a real part equal to n = 3.52 based on ellipsometry measurements, whereas, in this study, its imaginary part was not taken into consideration, as the k value is dependent on the overall process and doping level. The small length of this part being less than 30µm though, will not alter the overall results significantly. This waveguide, as seen in Fig. 3(b) and Fig. 3(c), supports a fundamental TM plasmonic mode with an effective index Re{neff} = 3.284 and a hybrid high-order mode with a Re{neff} = 3.072 at 1.31µm. The rationale behind the 500 nm width of the Cu metal will be clarified in Section 3.2, where the results from multiple simulations for various metallic widths will be demonstrated. The chosen width is as a trade-off between optimum coupling efficiency, low propagation losses and minimized beating phenomena between the plasmonic and hybrid modes. As shown in Fig. 3(d) and Fig. 3(e), the plasmonic mode is concentrated in the BTO material, with a very small percentage residing at the edges of the plasmonic metal. Thus, according to Fig. 3(d) its effective index increases, while as seen in Fig. 3(e) the confinement inside the BTO is also enhanced to a value close to 31.5% for a metal width of 500 nm. At the same time, the propagation losses decrease with the rise of the plasmonic width, as for smaller widths a larger field proportion is lying at the edges of the metal. On the other side, the hybrid high-order mode has a cutoff near 100 nm, while its polarization is mostly-TE for widths below 300 nm and becomes TM for higher values. This polarization variation is highlighted by an increase in the mode’s propagation losses as shown in Fig. 3(e). Finally, it should be noted that this waveguide supports more high-order modes for widths higher than 850 nm and due to the even and odd symmetry of the two modes, regardless of the polarization it is expected that the two modes will interfere, as it will be discussed in detail in Section 3.2. At 500 nm width, for the supported fundamental TM mode shown in Fig. 3(e), the propagation losses are near 0.5 dB/µm.
Fig. 3. (a) Cross section of the designed aSi/BTO/Cu HPW waveguide with variable plasmonic-metal width, (b) yz-image of the |E| field distribution of the fundamental TM-mode and (c) yz-image of the |E| field distribution of the hybrid high-order mode supported by the 500 nm wide plasmonic waveguide, (d) Effective Refractive Index Re{neff} of the fundamental TM- and hybrid high-order mode, and (e) Confinement Factor (%) of the fundamental TM-mode and Propagation Losses (dB/µm) of both modes of the HPW waveguide.
The second plasmonic configuration investigated in this work is the plasmonic MIM slot waveguide that can support highly confined plasmonic modes in the BTO layer [22], but this comes at the cost of higher propagation losses. Figure 4(a) presents the cross-section of the proposed plasmonic-slot waveguide, that is formed by two Cu films with 100 nm thickness spaced apart by a variable distance and filled by BTO of equal thickness. This horizontal MIM waveguide was electromagnetically analyzed through 2D-FD eigenmode calculations by varying the slot width. Figure 4(b) illustrates the propagation losses and confinement factor in the slot. According to what was expected the confinement factor decreases for widening slots, but, overall, it is higher than 50% for slot widths up to 150nm, whereas the propagation losses are lower than 1.25dB/µm for widths higher than 50nm. For a 100nm slot width value that is compatible with e-beam lithography, the propagation losses of the TE plasmonic mode are 0.78dB/µm, while the power confinement in the slot is close to 56.2% at a free-space wavelength of λ=1310nm. Due to the relatively low loss and high confinement of the mode, this width was selected as the optimum compromise in the following simulations for the evaluation of the photonics to plasmonics interface.
Fig. 4. (a) Cross section of the designed Cu/BTO/Cu (MIM) plasmonic slot waveguide, (b) Confinement factor (%), and Propagation Losses (dB/µm) for increasing slot width, and (c) Effective refractive index Re{neff} of the TE plasmonic-slot waveguide mode for increasing slot widths, (d) Effective refractive index Re{neff} of the TE photonic mode supported by the aSi waveguide for various widths. BTO thickness is 100 nm in all graphs.
The existing phase-mismatch between the initial TE-mode of the Si3N4 waveguide and the plasmonic mode of the MIM slot prohibits direct directional or adiabatic coupling at λ=1310nm. Figure 4(c) illustrates the plasmonic slot mode’s effective index Re(neff) versus slot width, with the value remaining well above 2.28 in the high confinement regime emerging for slot widths lower than 150 nm. For this reason, a 220nm thick aSi layer, providing an effective index between those of the Si3N4 and the plasmonic modes, can act as an intermediate interposer for seamless light transfer from the Si3N4 to the CMOS plasmonic waveguide. This aSi layer is spaced apart 100nm from the top of the Si3N4. To couple light, from aSi to the favorable 100nm wide plasmonic slot geometry, eigenmode calculations were performed for the decoupled aSi and plasmonic MIM slot waveguides and the results are shown in Fig. 4(d). From this graph it is revealed that near optimum phase matching conditions exist for a slot-width of 100nm and an aSi waveguide width of 350nm. This sets the base for directional coupling between the two waveguides [38]. In Section 3, the design of both multi-step couplers for light transfer from Si3N4 to HPW and plasmonic MIM slot waveguides is analyzed in detail. The coupling performance of both configurations is calculated in the following sections only for the 1310 nm wavelength, due to the lack of ellipsometry data for the BTO in the whole O-band.
3. Design analysis for efficient couplers between Si3N4 and Cu/BTO/aSi HPW plasmonic waveguides
3.1 Adiabatic coupling configuration
This section analyzes the design of the adiabatic coupler of Fig. 1(a), required for efficient light transfer between the 800 × 800nm2 Si3N4 and the photonic aSi/BTO waveguide for the TM polarization. The interface relies on linear tapers, one for the Si3N4 and one for the aSi/BTO layer spaced by 100nm thick SiO2 interlayer with the complete layout depicted in the 3D schematic of Fig. 5(a). The width of the Si3N4 waveguide decreases linearly, while the width of the aSi/BTO waveguide increases towards the x direction, with both tapers featuring the same length for efficient mode conversion towards compliance with the phase matching condition. The initial aSi/BTO waveguide width was 250 nm based on 2D-eigenmode calculations for the determination of the tip widths that will enable compliance with the adiabaticity criterion [40]. The Si3N4 taper tip has a width of 200nm, while the aSi/BTO taper tip has a width of 150nm. The optimum taper of the linear adiabatic taper was calculated with full-wave 3D-FDTD calculations by sweeping the length from 7µm to 40µm, while PML boundary conditions were set again at the edges of the computational window to artificially absorb incoming electromagnetic fields. Figure 5(b) presents the results of the simulations with maximum efficiency obtained at Lc = 16µm, reaching values of only -0.16dB. For this length, the sideview of the electric field distribution obtained at a vertical mid-plane located at the center of both the aSi/BTO and Si3N4 waveguides can be seen in Fig. 5(c), validating the efficient light transfer from the Si3N4 to the aSi/BTO platform. Clearly, the optical power couples to the TM-mode of the aSi/BTO waveguide and mostly concentrates at the top and the bottom of the aSi/BTO waveguide. From this point the optical power transfers to the final end-fire coupling step towards the plasmonic structure.
Fig. 5. (a) 3D-depiction of Si3N4-to-aSi/BTO adiabatic coupler, (b) Coupling efficiency (dB) for increasing adiabatic taper length, (c) Sideview of the |E| field distribution for the optimum coupling length of 16µm.
3.2 End-fire coupling step and transition taper
The following section presents the design of the end-fire coupler stage from the aSi/BTO to the Cu/BTO/aSi plasmonic waveguide, with the overall 3D schematic presented in Fig. 6(a). Its coupling performance is dominated by the optimum spatial matching between the initially excited and the targeted mode and thus should employ a different aSi/BTO waveguide width from the one used in the adiabatic coupling stage. This sub-section is comprised of two parts: coupling from the photonic to the plasmonic waveguide and coupling from the cross-section without the metal electrodes on aSi to the cross-section with the metal electrodes on aSi enabling light modulation. The identification of the optimum geometry for both photonic and plasmonic structures was performed via spatial power overlap integral calculations. Figure 6(b) presents the corresponding results for waveguide widths varying between 150nm and 850nm, where clearly the spatial overlap integral is improved for larger widths, as the modal field concentrates better inside the slot. For widths higher than 400nm the coupling losses reach a plateau and are equal to 1.59dB for 800nm width. At this point, the higher order modes are becoming more TM and plasmonic having increased propagation losses according to Fig. 3(e). This leads to an expected stronger interference with the fundamental plasmonic mode. For this reason, a plasmonic metal width of 500nm was selected as a compromise between high power overlap values and decreased interference phenomena. For this width, the power overlap integral value is close to 1.65dB, whereas the supported modes in the photonic aSi/BTO, narrow HPW and wide HPW geometries are depicted in Fig. 6(c), (d) and (e), respectively. The transition from the narrow to the wide HPW yielded losses between 0.2dB and 0.3dB for all widths based on the power overlap integral. The validity of the previous results was verified with full-wave 3D-FDTD numerical simulations. The total interface losses are calculated for a yz-monitor plane, at a certain distance L from the beginning of the plasmonic waveguide and include the conversion losses Aconv plus the total propagation losses Aprop_L, where Aprop_L[dB] Aprop[dB/µm] * L[µm], with Aprop calculated from the 2D-eigenvalue problem. For the plasmonic metal width of 500nm, according to the 3D-FDTD simulations, the propagation losses of the targeted plasmonic mode in the HPW waveguide were calculated as 0.5dB/µm and the conversion losses close to 1.6dB. The slight improvement from the power overlap integral value is attributed to the effective index matching in the two waveguides, taken into account in the 3D-FDTD calculations and the beating phenomena with the hybrid plasmonic-photonic mode. A sideview (xz-plane) of the simulated geometry can be seen in Fig. 7(a) and the respective electric field distribution |E| is presented in Fig. 7(b), (c) and (d) for widths of 150nm, 500nm and 800nm, respectively. The above analysis reveals that the dominant loss contribution comes from the propagation losses in the plasmonic waveguide, while the modal mismatch of the photonic and the HPW mode is only minor for a width of 500nm. For a width of 150nm, near the cutoff of the hybrid mode, the beating phenomena are less intense as shown in Fig. 7(b) at the expense of higher total losses getting as high as 6.43dB, with “pure” coupling losses calculated to 4.4dB. All values are calculated at 3µm far from the end of the interface (x = 3µm). This coupling loss value is very close to the power overlap integral value presented in Fig. 6(b), as beating phenomena with the hybrid mode are becoming almost negligible for this width. Going on the other end now, for an 800nm plasmonic width the beating phenomena are more intense as shown in Fig. 7(d) and total losses are close to 2.75dB, with the clear mode conversion losses getting down to 1.37dB. However, now there is strong deviation from the power overlap integral value of Fig. 6(b), because there are more intense beating phenomena with the hybrid mode that lead to a drastic decrease of the total propagation losses. The effect of beating can be avoided though using a directional coupler between aSi and the HPW as in [26], but for such tightly confined cross-sections the coupling loss increases to values higher than 4dB. In parallel phase-matching conditions are becoming challenging to achieve. Simulations were also performed for an increased 340 nm aSi-thickness, where phase-matching with the HPW is easily achieved. This would allow the design of very efficient in-plane directional couplers featuring coupling losses of only 1.45 dB for a gap of 100 nm. However, this design transfers a heavy burden to the Si3N4-to-aSi adiabatic coupler. The effective index mismatch for a minimum 100 nm taper tip results now to 3.43 dB insertion loss for this part for adiabatic coupling lengths up to 220µm, bringing the total interface loss to 4.88 dB. Finally, it was calculated with 3D-FDTD simulations that, for lengths longer than for 20µm, the losses from the linear adiabatic aSi/BTO taper connecting the two sections with the different widths are lower than 0.0055dB. In conclusion, the total coupling losses for this interface are lower than 1.7655dB, with 0.16dB coming from the adiabatic coupling section, 0.0055dB approximately from the transition taper step and 1.6dB from the end-fire photonic-to-plasmonic mode conversion. For futher improvement regarding the elimination of the beating phanomena, an 1µm long plasmonic taper can be inserted in the structure after the end-fire interface. This is achieved at the expense 0.26 dB extra losses calculated for the transition from an input 500 nm initial HPW width to a final 150 nm HPW width value.
Fig. 6. (a) 3D-depiction of the end-fire coupler between aSi/BTO and plasmonic aSi/BTO/Cu (HPW) waveguide, (b) power overlap integral values for transition from aSi/BTO to plasmonic HPW geometry for various widths, Fundamental TM-mode of a (c) 500 nm-wide aSi/BTO waveguide, (d) a 500 nm wide finite aSi/BTO/Cu waveguide and (e) aSi/BTO/Cu waveguide geometry with metal electrodes enabling light modulation.
Fig. 7. (a) xz-depiction of the simulated aSi/BTO to plasmonic aSi/BTO/Cu interface, (b) xz-image of the |E| field distribution for HPW width of 150 nm, (c) 500 nm and (d) 800 nm.
3.3 Tolerance Analysis of Interface Structures
In the analysis presented above, at the adiabatic coupling step the center positions of the aSi/BTO taper and of the Si3N4 taper in the y-axis are perfectly aligned. Additionally, at the end-fire step, the plasmonic metal resided exactly on top of the center of the aSi/BTO waveguide in the y-axis with a fixed metal width value. In this section the deterioration of the coupling performance is investigated via thorough 3D-FDTD calculations, for misalignment in the y-axis for 100nm, 200nm, 300nm at the adiabatic section and for metallic width variations of 50, 100 and 150nm in the end fire coupling interface as shown in the inset of Fig. 8(b). The results for the adiabatic coupling step are presented in Fig. 8(a), where excess losses close to 0.25dB are induced for a misalignment value of 300nm. Additionally, according to the results of Fig. 8(b), for the end-fire coupler there are 0.4dB extra losses for a 150 nm difference from the ideal layout. Regarding variations in the z-axis, we investigated the impact of ±5% material thickness variations of aSi, Si3N4, SiO2 gap, BTO and Cu to the whole interface performance. Herein, between the ±5% values, the worst one is referred. Initially, the thickness of the semiconductor aSi of the HPW was altered by ±5% with the 3D-FDTD simulations pointing to excess coupling losses lower than 1.14dB for + 5%, while a ±5% change in the thickness of the 20nm thick BTO led to deterioration of coupling performance by only 0.1dB for +5%. Similarly, a ±5% thickness difference of the 100nm thick Cu decreased the coupling efficiency by only 0.1dB again for +5%. The coupling efficiency was decreased by only 0.04dB for -5% Si3N4 thickness and finally, for a 5% variation at the dielectric SiO2 gap the coupling losses were increased by only 0.1dB. A yz-simultaneous misalignment between the photonic and the plasmonic waveguide is not expected in this case, since both geometries are lithographically defined in the same layer.
Fig. 8. (a) Coupling efficiency (dB) for increasing misalignment values (nm) of the aSi/BTO taper from the Si3N4 taper in the y-axis (b) Coupling efficiency (dB) for metal width difference values Δw (nm) at the end-fire part.
4. Design of couplers between Si3N4 and plasmonic MIM slot Cu/BTO/Cu waveguides
4.1 Adiabatic coupling configuration
This section presents the design of a multi-step coupler for efficient TE-dominant mode transition from a Si3N4 to a plasmonic MIM waveguide capable of light phase modulation. This multi-step coupler employs an adiabatic Si3N4-to-aSi stage and a directional aSi-to-Cu/BTO/Cu step. The adiabatic coupler was designed in a similar manner to the adiabatic coupler of Section 3.1, having [40] as a basis. Figure 9(a) illustrates a 3D-schematic of the optimum Si3N4-to-aSi coupler geometry, while Fig. 9(b) presents the results from the 3D-FDTD simulations for the variation of the taper length between 10µm to 100µm, where it is evident that the coupling efficiency saturates after 60µm, while a 90µm adiabatic coupling length is almost lossless (losses of 0.06dB). This is verified by the xz-plane of the |E| field distribution shown in Fig. 9(c) demonstrating an efficient light transition from the aSi to the Si3N4 waveguide. For this interface configuration, the aSi width of 350nm is also suitable for the next coupling step to the plasmonic MIM waveguide, obeying the phase matching condition for directional coupling to the 100nm wide plasmonic slot.
Fig. 9. (a) 3D-depiction of the designed Si3N4-to-aSi adiabatic coupler, (b) Coupling efficiency (dB) for increasing adiabatic taper length, (c) Sideview (xz-plane) depiction of the |E| field distribution at the center (y = 0) of the adiabatic coupler.
4.2 Directional coupling to the plasmonic slot
A directional coupling technique was selected for the light transfer from the aSi to the plasmonic slot targeting the minimization of the coupling length contributing with extra propagation losses. The 3D-schematic of the whole layout is presented in Fig. 10(a). The 2D-eigenvalue problem was initially solved for the uncoupled aSi and Cu/BTO/Cu slot waveguides and then for the coupled waveguide system to show the existence of supermodes. As shown above in Fig. 4, for a slot width of 100nm in the MIM waveguide and an aSi waveguide width of 350nm, the two cross-sections in the uncoupled eigenvalue problem support TE-modes with almost the same effective refractive index. For this reason, these geometrical characteristics set favorable conditions for the hybrid plasmonic waveguide system to support supermodes of even and odd symmetry that can efficiently be excited in a directional coupling scheme. These modes are easily detected via eigenmode calculations at the hybrid waveguide yz-plane of Fig. 10(a). Figure 10(b) and 10(c) show the real part of the y-vectorial components of the electric fields Re{Ey}of the two TE-supermodes exhibiting an even and an odd symmetry, respectively. The even supermode of Fig. 10(b) mostly resides inside the slot and therefore has higher propagation losses of 0.46dB/µm, while the odd mode of Fig. 10(c) has a large power percentage residing in the center of the aSi waveguide and thus, the propagation loss value is a little bit lower to 0.33dB/µm. This phenomenon is a direct outcome of the overall photonic-plasmonic mode hybridization in the hybrid waveguide plane. After the excitation of the final plasmonic slot mode by the end of the hybrid waveguide region, the propagation losses of the plasmonic mode are the ones calculated by the 2D-eigenmode solution for the slot.
Fig. 10. (a) 3D-depiction of the aSi-to-MIM directional coupling step, (b) Even and (c) Odd hybrid supermodes supported by the coupled aSi and plasmonic waveguide system.
Utilizing the modes of even and odd symmetries shown in Fig. 10, the beating of the two supermodes can lead to directional coupling at a coupling length Lc that has been calculated initially to Lc = 2.67µm in a semi-analytic manner. Full-wave 3D calculations were used to reveal the transition losses for such a length with the sideview of the directional coupler seen in Fig. 11(a). The interlayer SiO2 layer was set again to 100nm, while the coupling length is the overlapping region of the aSi and the slot waveguides. The 3D-FDTD simulations reveal now an efficient transition with total losses close to 1.23dB, coming from a monitor placed at x = 3µm, directly after the coupler, and this value includes the propagation losses of the two supermodes in the hybrid coupler. This is validated by the retrieved electric field distribution at the xz-plane (sideview), of the electric field |E| presented in Fig. 11(b). As shown also in the topview of the |E| field in Fig. 11(c) at the end of the interface, light is tightly confined in the Cu-based plasmonic slot. The light transfers in the slot in a reflectionless and low loss manner, with the field values increasing due to the ultra-high mode confinement of the final mode inside the CMOS plasmonic slot. In contrast with the hybrid plasmonic waveguide, in the final plasmonic cross-section only the fundamental plasmonic mode has been excited in the phase shifter, highlighting the slot waveguide as the most promising of the two configurations for light modulation.
Fig. 11. (a) Sideview (xz-plane) depiction of the simulated directional coupler geometry, (b) Sideview (xz-plane) depiction of the |E| field distribution at the center (y = 0), and (c) Topview (xy-plane) depiction of the |E| field distribution at the center (z = 0.06µm) of the aSi-to-MIM directional coupler
4.3 Tolerance analysis of interface structures
As in the HPW case, the waveguides at the adiabatic and the directional coupling step were perfectly centered on top of one another in the y-axis. Figure 12 illustrates the effect of misalignments of the upper waveguide layer in the y-axis from the center of the propagation axis to the efficiency of the adiabatic and the directional coupling step, respectively. According to Fig. 12(a) in the worst-case scenario, a 300nm misalignment at the adiabatic step leads to 1dB excess loss from the optimum placement, while from Fig. 12(b) a y-axis 200nm misalignment at the directional coupler raises the total loss by 2.6dB. The same graph reveals also that for 300nm there is a sharp drop in the efficiency going down to -11.13 dB. The next step in the tolerance analysis is again the investigation via 3D-FDTD simulations of the impact of a ±5% variation in the thickness of the aSi, SiN, SiO2 gap, BTO and Cu materials to the whole coupling efficiency performance. Again, the worst case of the two variations is presented. A -5% variation to the SiO2 gap leads to 0.004dB extra losses to the adiabatic coupler and 0.05dB to the directional coupler, highlighting that the device is quite tolerant to gap thickness alterations. A -5% variation to the thickness of Si3N4 increases the losses by only 0.011dB, while the thickness of the aSi was the most critical of the parameters. -5% thickness from the targeted 220 nm value, enhances the losses by 0.4dB. Finally, by modifying the thickness of the whole plasmonic slot by 5%, namely the thickness of the BTO and Cu materials, the extra induced losses did not surpass 0.02dB. So, the same interface design can be directly transferred to even thicker BTO plasmonic phase shifters targeting higher efficiency with minimum coupling penalty.
Fig. 12. (a) Coupling efficiency (dB) for increasing misalignment values (nm) of the aSi taper from the Si3N4 taper in the y-axis (b) Coupling efficiency (dB) for increasing misalignment values (nm) of the aSi from the MIM waveguide in the y-axis.
5. Comparison with other CMOS plasmo-photonic interfaces
Table 1 summarizes the main results of our work and compares them with significant relevant work presented in the literature up until now regarding Si- and Si3N4-based photonic to CMOS compatible plasmonic interfaces. The proposed interfacing scheme utilizes a Cu metal for the plasmonic formation and a BTO electro-optic material suitable for pure phase modulation in very simple configurations, unlike [32] and [33] that incorporate an amplitude only modulator. The better overall performance in [32] comes from the large modal overlap and the MOS type of the plasmonic waveguide having large semiconductor layer thicknesses. In active modulation, the capability of such devices for operation at higher than 100Gbaud rates is questionable due to the increased capacitance value. The same is valid for [33], where the simulated Si-to-HPW coupling losses are close to the calculated value for the aSi-to-HPW step in our work. Compared to [37] and [35] also that perform coupling to Cu-based slots filled by air and SiO2 respectively, the final plasmonic waveguide in this work is a slot filled by an electro-optic material suitable for modulation in the O-band that provides much higher confinement for high modulation efficiency. In [35] the losses are higher than the results of this work. In [37] the slot width is relaxed to 200 nm to achieve proper phase-matching and facilitate the photonic to plasmonic transition. The difference in the effective indexes between the initial photonic and targeted plasmonic mode was very small, less than 0.3. Finally, [36] demonstrates a higher confinement factor for efficient high-speed electro-optic modulation, but the interface losses are slightly higher. This comes as no surprise since from the analysis above it is apparent that there is a tradeoff between coupling efficiency and confinement of the mode in the phase shifter. Finally in comparison to [36], the coupling scheme to the examined HPW structure induces lower losses, while it is also capable of electro-optic modulation. Overall, between the HPW and MIM coupling configurations presented herein, the plasmonic slot structure manages to retain high optical confinement and achieves low-loss excitation of a single mode in the final phase-shifter cross-section, thereby being considered the best of the two proposed designs in this paper.
6. Summary
This work presents a systematic analysis for the design of low-loss multi-step couplers between Si3N4 and Cu based CMOS plasmonic waveguides with ferroelectric BTO material for phase shifters operating in the O-band. The HPW waveguides provide lower plasmonic propagation losses of 0.5 dB/µm, compared to 0.78 dB/µm for the MIM. The MIM though is preferable for light modulation as it features higher field enhancement and modal confinement in the slot calculated to 56.2% versus the 31.5% in the HPW. The calculated loss values coming from 3D-FDTD simulations are 1.75dB for the Si3N4-to-HPW interface with 20nm thick BTO-filled gap and 1.29dB for the Si3N4-to-horizontal-MIM coupler with 100nm wide slot and 100nm thick BTO. The overall analysis shows that MIM waveguide is the preferred layout for phase shifters as it achieves the sole excitation of the targeted plasmonic mode that is highly confined in the slot at the expense of higher propagation losses. In the HPW design, an 1µm long plasmonic taper after the end-fire interface can suppress beating at the expense of extra 0.26 dB coupling loss. Finally, for manufacturability purposes the work presents a detailed tolerance analysis to lateral misalignment values between all sections for both designs. In addition, performance tolerance results were extended to a ±5% thickness variation of each material, including dielectrics and metals, with 3D-FDTD simulations indicating again almost negligible power penalty for these scenarios. This systematic analysis is expected to pave the way for the realization of low insertion loss, compact and low-power CMOS plasmonic phase shifters on Si3N4 in the O-band.
Funding
H2020 LEIT Information and Communication Technologies.
Acknowledgements
We would like to acknowledge the European H2020 NEBULA (contract no. 871658) project.
Disclosures
The authors declare no conflicts of interest.
Data Availability
Data underlying the results presented in this paper are not publicly available at this time but may be obtained from the authors upon reasonable request.
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