1. Introduction

All-optical logic operation is one of the unsolved challenges in all-optical signal processing and complex optical computing [1,2]. Current logic operation schemes implement basic logic operations including OR [3], XOR [4,5], and some complex logic functions, such as full adder [6,7], encoder [8], and programmable logic array (PLA) [9]. Among them, all-optical PLA has great potential for future complex optical computing owing to its flexibility and user-defined features. The PLA enables arbitrary logic functions by power coupling the canonical logic units (CLUs), i.e., the minterms [10]. Thus, it is also called CLUs-PLA. The CLU is the basic building block of PLA; it is important for future complex logic operations [11], high-speed optical logic processing [12], quantum key distribution system [13,14], and quantum digital signatures [15]. CLUs are mainly implemented via various nonlinear effects in nonlinear devices, such as cross gain modulation (XGM) in semiconductor optical amplifiers (SOAs) [16,17], cross-phase modulation (XPM) [18,19], and four-wave mixing (FWM) [20,21] in highly nonlinear fiber (HNLF) or SOAs. Among them, FWM is a more suitable candidate for future high-speed and high-capacity optical logic processing owing to its rate transparency and multi-channel parallel processing ability [22,23].

The simultaneous generation of a full set of CLUs is the key issue of PLAs regarding the implementation of arbitrary logic functions. The implementation of more different types of CLUs in a single nonlinear device can greatly reduce the number of nonlinear devices, which significantly reduces the system complexity of PLAs [24]. The two-input CLUs-PLA has four different types of mutually exclusive CLUs; 16 different logic functions can be achieved by different CLU combinations. Some researchers have developed schemes based on a single nonlinear device to generate different types of two-input CLUs [16,25–27], including the implementation of four different types of CLUs via FWM in a silicon waveguide, thus, enabling arbitrary two-input logic functions [26]. Compared with two-input CLUs-PLAs, three-input CLUs-PLAs contain eight different types of CLUs with richer logic functions. Based on the simultaneous generation of eight three-input CLUs, 256 different functions can be achieved by power coupling these CLUs. However, in the current schemes of three-input CLUs-PLAs, no more than two types of three-input CLUs can be generated in one nonlinear device [24,28]. In these cases, the required number of nonlinear devices of three-input PLAs is greater than four, which greatly increases the complexity of the computing system, thereby hindering the application of all-optical three-input PLAs. Therefore, it is of great importance to develop three-input PLAs based on single nonlinear device to obtain arbitrary functions. The significant reduction in the number of nonlinear devices in the system will simplify the computing system and reduce power consumption, which will lay the foundation for future complex optical computing processes.

In this paper, we propose a new scheme for the simultaneous generation of a full set of three-input CLUs in only one nonlinear device. By exploiting the wavelength parallelism of light and bidirectional FWM, eight different types of three-input CLUs can be generated simultaneously at different channels. Based on the proposed CLUs-PLA, we experimentally demonstrate the generation of a series of combinational logic operations, including user-defined logic functions, full adder and full subtractor. Moreover, the proposed CLUs-PLA has great potential for future high-performance optical computing operations and optical logic processing chips.

2. Operational principle of three-input CLUs-PLA for arbitrary functions

The operational principle of the proposed three-input CLUs-PLA with one nonlinear device is shown in Fig. 1(a). The three-input CLUs-PLA consists of input circuit, CLUs array and coupling array. The input circuit consists of a delay interferometer (DI) to generate optical signals with five pairs of complementary codes. The CLUs array is formed by one nonlinear device to perform AND operations that generate a full set of three-input CLUs simultaneously. The coupling array is used to obtain arbitrary functions based on these CLUs.

 

Fig. 1. (a) Operational principle of three-input CLUs-PLA with one HNLF for arbitrary functions. AWG: arrayed waveguide grating; DI: delay interferometer; HNLF: highly nonlinear fiber; PF: programmable filter. (b) Spectra distribution of original signals and full set of CLUs during bidirectional FWM in HNLF. (c) Structures of full-adder and full-subtractor; A, B, and C are input signals; Sum, Carry, Diff, and Borrow are logic results.

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2.1 Operational principle of simultaneous generation of three-input CLUs

The full set of three-input CLUs consists of ${\bar{A}\bar{B}C}$, $\textrm{ABC}$, ${\bar{A}BC}$, ${A\bar{B}C}$, ${AB\bar{C}}$, ${\bar{A}\bar{B}\bar{C}}$, ${A\bar{B}\bar{C}}$, ${\bar{A}B\bar{C}}$; these CLUs involve six elements: A, B, C, $\bar{A}$, $\bar{B}$, and $\bar{C}$. A and $\bar{A}$ are a couple of complementary elements, while ${\bar{A}\bar{B}C}$ is the product of $\bar{A}$, $\bar{B}$, and C; the same goes for the other CLUs. When the three elements $A$, B, and C are selected as input signals of the CLUs array, only one three-input CLU is generated by FWM in the nonlinear device, i.e., $\textrm{ABC}$ is generated. Thus, to generate more different types of CLUs in one nonlinear device, the number of elements entering the nonlinear device should be increased. By using the parallelism of light, six elements should be carried in different wavelength channels to generate eight different types of CLUs simultaneously in the same nonlinear device. However, more input elements require nonlinear device with larger FWM conversion bandwidth to prevent inter-channel crosstalk and improve the signal quality of the CLUs. Here, bidirectional FWM is adopted to reduce the number of elements entering the nonlinear device from six to five. As shown in Fig. 1(a), operation information $A$, B, and $C$ is carried in five optical signals. Signal $C$ is carried in ${\lambda _1}$, signal A is carried in ${\lambda _2}$ and ${\lambda _4}$, and signal B is carried in ${\lambda _3}$ and ${\lambda _5}$. These five differential phase-shift keying (DPSK) signals are coupled by arrayed waveguide grating (AWG1) and then injected into the DI. DI is an asymmetric Mach–Zehnder interferometer with a differential delay of τ; thus, the transmission spectrum of the DI is comb-like with periodic transmission peaks and notches. The DI is used to demodulate five DPSK signals simultaneously into on-off keying (OOK) signals with complementary codes [29]. Only when the bit rate of DPSK is identical to the FSR of the DI, the DPSK signal can be demodulated by the DI to produce OOK signals with complementary codes. When the demodulated DPSK is 40 Gb/s, the FSR of the DI should be 40 GHz, and differential delay of τ is 25 ps. When the carrier wavelength of the input DPSK signal aligns with the peaks or notches of the transmission spectrum of the DI, the DPSK signal can be demodulated by the DI. Here, we define that if the carrier wavelength aligns with a peak of the upper port of the DI, the upper port of the DI outputs the original code ($A$, $B$, and $C$), and the lower port of the DI outputs the inverse code ($\bar{A}$, $\bar{B}$, and $\bar{C}$). As shown in Fig. 1(a), for the upper port of the DI, ${\lambda _1}$, ${\lambda _2}$, and ${\lambda _3}$ align with the peaks, and ${\lambda _4}$ and ${\lambda _5}$ align with the notches. Hence, C, A, B, $\bar{A}$, and $\bar{B}$ can be generated simultaneously. For the lower port of the DI, $\bar{C}$, $\bar{A}$, $\bar{B}$, A, and B can be generated simultaneously. In this way, C, A, B, $\bar{A}$, and $\bar{B}$ and $\bar{C}$, $\bar{A}$, $\bar{B}$, A, and B are the input signals of the CLUs array.

In the CLU array, the nonlinear device (i.e., the HNLF) is a discrete device with low loss and wide FWM conversion bandwidth, which is suitable for generating multiple types of CLUs based on bidirectional multi-channel FWM. By introducing bidirectional FWM, C, A, B, $\bar{A}$, $\bar{B}$, and $\bar{C}$, $\bar{A}$, $\bar{B}$, A, B can be used as input signals that simultaneously enter the HNLF. When the power of the input optical signals is high enough, multichannel FWM can occur in the HNLF, thereby resulting in different types of CLUs. Following the sequence of red arrows, C, A, B, $\bar{A}$, and $\bar{B}$ enter the HNLF to generate ${\bar{A}\bar{B}C}$, $\textrm{ABC}$, ${\bar{A}BC}$, and ${A\bar{B}C}$ via FWM. Similarly, following the sequence of purple arrows, $\bar{C}$, $\bar{A}$, $\bar{B}$, A, and B enter the HNLF to generate ${AB\bar{C}}$, ${\bar{A}\bar{B}\bar{C}}$, ${A\bar{B}\bar{C}}$, and ${\bar{A}B\bar{C}}$. The spectra distribution of the original signals and three-input CLUs in the HNLF is shown in Fig. 1(b). The central wavelengths ${\lambda _1}$, ${\lambda _2}$, ${\lambda _3}$, ${\lambda _4}$ and ${\lambda _5}$ are applied to CH1, CH2, CH6, CH13 and CH16, respectively. The frequency spacings between adjacent channels are identical. For FWM in one direction, C, A, B, $\bar{A}$, and $\bar{B}$ are the input signals of CLUs array. When C, $\bar{A}$, and $\bar{B}$ act as pump signals, the converted signal in CH4 at ${\omega _1}\textrm{ + }{\omega _5}\textrm{ - }{\omega _4}$ carries the amplitude information of ${\bar{A}\bar{B}C}$ [11]. Because the amplitude of the converted signal is proportional to the amplitude product of the three pump signals, C, $\bar{A}$, and $\bar{B}$, the converted signal carries the logic “1” state only if all input pump data are in the “1” state. For FWM in the other direction, when $\bar{C}$, A and $B$ are the pump signals, the converted signal in CH4 at ${\omega _1}\textrm{ + }{\omega _5}\textrm{ - }{\omega _4}$ carries the amplitude information of ${AB\bar{C}}$. Similarly, other six CLUs in CH7, CH8 and CH15 can be obtained with FWM processes under different pump signals as shown in Table 1.

Table 1. Table Compares Input Signals Corresponding to Different Output Results

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2.2 Operational principle of arbitrary functions based on three-input CLUs:

Based on the full set of three-input CLUs, arbitrary three-input logic function can be obtained by power coupling certain CLUs. A programmable filter (PF) (Waveshaper 1000S) controls the transmissivity of different wavelengths through programming. The coupling array consists of two PFs such that the user can select the CLUs of several specific wavelength channels. The principles of a series of combinational all-optical logic functions, including user-defined logic functions, full adder and full subtractor, are presented in the following paragraph.

We consider the following four combinational logic functions as examples of all-optical user-defined logic functions:

The all-optical full adder and full subtractor are important combinational logic devices for future high-speed optical computing. Their structures are shown in Fig. 1(c). In the full-adder, A is an addend, B is a summand, and C is the carried information from a former addition. The output Sum is the current sum, and Carry is the carry-out to the next addition. In the full-subtractor, A is a subtrahend, B is a minuend, and C is a borrow-in bit from the less significant bit order position. The output Diff represents the current difference, and Borrow represents the borrow-out to the next subtraction. It is known that the outputs of the full-adder and full-subtractor can be presented as follows:

One can see that Sum is identical to Diff.

According to the previously presented Boolean algebra expression, the full-adder and full-subtractor can be obtained based on a full set of three-input CLUs, as shown in Fig. 1(a). For the production of Sum, ${\bar{A}\bar{B}C}$, ${\bar{A}B\bar{C}}$, ${A\bar{B}\bar{C}}$, and $\textrm{ABC}$ should be selected and power coupled. As for Carry bit of the full adder, ${\bar{A}BC}$, $\textrm{ABC}$, ${A\bar{B}C}$, and ${AB\bar{C}}$ should be selected and power coupled. As for Borrow bit of full subtractor, ${\bar{A}BC}$, $\textrm{ABC}$, ${\bar{A}\bar{B}C}$, and ${\bar{A}B\bar{C}}$ should be selected and power coupled. Therefore, based on the simultaneously generated three-input CLUs, arbitrary logic functions, including full adder and full subtractor, can be implemented.

3. Experiment with three-input CLUs-PLA for arbitrary functions

Figure 2 shows the experimental setup of the three-input CLUs-PLA. Five tunable lasers (TLs) (Alnair Labs TLG-200) generate five continuous-wave (CW) beams with the wavelengths 1536.7 nm (${\lambda _1}$), 1538.11 nm (${\lambda _\textrm{2}}$), 1544.74 nm (${\lambda _3}$), 1555.77 nm (${\lambda _4}$) and 1560.3 nm (${\lambda _5}$). After the five polarization controllers (PCs), these CW beams are coupled by AWG1 (Accelink) with free-spectral range (FSR) of 1.6 nm. The central wavelength of the AWG complies with the International Telecommunications Union grid in the C band. The 2⁷−1 pseudorandom binary sequence (PRBS) signal at 40 Gb/s is generated by the bit pattern generator (BPG) (SHF 12104A), driving the Mach-Zehnder modulator (MZM) (Fujitsu) to modulate these five CW beams to five non-return-to-zero differential phase-shift keying (NRZ-DPSK) optical signals. After amplification by a booster EDFA, the total average power of these five NRZ-DPSK signals is 15 dBm. Subsequently, the NRZ-DPSK pump signals are demodulated by the DI to produce five channels of OOK signals. One port of the DI outputs five signals with amplitude information of C, A, B, $\bar{A}$, and $\bar{B}$, respectively. The other port of DI outputs five signals with amplitude information of $\bar{C}$, $\bar{A}$, $\bar{B}$, A, and B, respectively. AWG2 and AWG3 with FSR of 1.6 nm are used to demultiplex the five pairs of signals at different wavelengths. Eight optical delay lines (ODLs) are used for code stream synchronization, and ten PCs are used to optimize the conversion efficiency of FWM effect. These signals are amplified by EDFAs and then coupled into two groups of signals via AWG4 and AWG5 with FSR of 1.6 nm. The two groups of signals are injected into the HNLF after passing through the optical circulators. The nonlinear coefficient of the 400 m HNLF is 10 W^-1·km⁻¹ with the zero dispersion wavelength of 1556 nm and dispersion slope of 0.006 ps/(nm²·km).

 

Fig. 2. Experimental setup for three-input CLUs-PLA for simultaneous generation of eight CLUs using bidirectional FWM in one HNLF. TL: tunable laser; PC: polarization controller; AWG: arrayed waveguide grating; BPG: bit pattern generator; MZM: mach-zehnder modulator; EDFA: erbium doped fiber amplifier; DI: delay interferometer;; ODL: optical delay line; HNLF: highly nonlinear fiber; PF: programmable filter.

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For FWM in one direction, C, A, B, $\bar{A}$ and $\bar{B}$ are the input signals. The measured average power of these signals before the HNLF are 13.4, 5.5, 16.4, 10.0 and 10.2 dBm, respectively. Subsequently, ${\bar{A}\bar{B}C}$, $\textrm{ABC}$, ${\bar{A}BC}$, and ${A\bar{B}C}$ can be output simultaneously. To demonstrate the efficiency of the FWM, the measured optical spectra achieved at the output of the HNLF is shown in Fig. 3(a). The results show evident FWM effect; the converted signals at 1541.1, 1546.15, 1547.7, and 1559.0 nm carry the amplitude information of ${\bar{A}\bar{B}C}$, $\textrm{ABC}$, ${\bar{A}BC}$, and ${A\bar{B}C}$, respectively. Some high power idlers in the other wavelength channels are the two-input CLUs generated via degenerate FWM. For example, the strongest idler at 1552.5 nm carries the amplitude information of $\textrm{BC}$ when B and C with high power are pump signals.

 

Fig. 3. Measured optical spectra of bidirectional FWM after the HNLF with five input signals. (a) Input signals are $C$, A, B, $\bar{A}$ and $\bar{B}$, output logic results are ${\bar{A}\bar{B}C}$, $\textrm{ABC}$, ${\bar{A}BC}$, and ${A\bar{B}C}$; (b) input signals are $\bar{C}$, $\bar{A}$, $\bar{B}$, A and $B$, output logic results are ${AB\bar{C}}$, ${\bar{A}\bar{B}\bar{C}}$, ${A\bar{B}\bar{C}}$, and ${\bar{A}B\bar{C}}$.

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These converted logic signals are extracted by PF1, which has single rectangular-like filtering channel with 3-dB bandwidth of 0.8 nm. All logic signals are monitored by the communication signal analyzer (CSA) (Agilent 86100C) and the optical spectrum analyzer (OSA) (Yokogawa AQ6370C). Similarly, Fig. 3(b) illustrates the FWM spectra in the other direction with the pump signals $\bar{C}$, $\bar{A}$, $\bar{B}$, A, and $B$; their measured respective average powers are 12.2, 14.0, 15.2, 10.8, and 8.5 dBm before the HNLF. It is evident that the FWM is also excited strongly. The converted signals at 1541.1, 1546.15, 1547.7, and 1559.0 nm, carry the amplitude information of ${AB\bar{C}}$, ${\bar{A}\bar{B}\bar{C}}$, ${A\bar{B}\bar{C}}$, and ${\bar{A}B\bar{C}}$, respectively.

In this way, a full set of three-input CLUs is simultaneously generated. Yn (n is a non-negative integer, n ≤ 7) in Fig. 2 represents the output results of the three-input CLUs-PLA. The eight results Y0-Y7 are the full set of three-input CLUs.

The temporal waveforms and eye diagrams of the original demodulated signals are illustrated in Fig. 4(a). There are three couples of optical signals with complementary codes. The output performance after the demodulation of DI is good. The eight different types of three-input CLUs are illustrated in Fig. 4(b). The logic sequences are correct and exhibit clear data streams. Moreover, the logic levels of the CLUs can be clearly identified and the eye diagrams are wide open.

 

Fig. 4. Measured temporal waveforms and eye diagrams. (a) Original signals with three couples of complementary codes, (b) simultaneous generation of eight different three-input CLUs in a single HNLF.

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We performed bit error rate (BER) measurements of the original data and the whole set of three-input CLUs, as shown in Fig. 5. Error-free performances have been achieved for all CLUs. Power penalties at a BER of 10⁻⁹ for the three-input CLUs are between −3.7 dB and −2.6 dB, thereby indicating the improved quality of the logic results. This improvement is mainly attributed to the decreased mark ratio (i.e., N_Logic1/N_Sequence) [18]. N_Sequence refers to the number of bits in a sequence cycle, and N_Logic1 refers to the number of logic 1 in this sequence cycle. More specifically, with a fixed average power at the receiver for the BER measurement, the logic results have a stronger peak power of each bit since the number of logic 1 greatly reduces after the AND logic operation.

 

Fig. 5. BER measurements of input demodulated signal A and eight different types of three-input CLUs, ${AB\bar{C}}$, ${\bar{A}\bar{B}\bar{C}}$, ${A\bar{B}\bar{C}}$, ${\bar{A}B\bar{C}}$, ${\bar{A}\bar{B}C}$, $\textrm{ABC}$, ${\bar{A}BC}$, and ${A\bar{B}C}$.

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Based on the full set of three-input CLUs, a series of combinational all-optical logic functions can be experimentally demonstrated. The experimental setup of the coupling array for generating arbitrary logic functions is shown in Fig. 6(a). By changing the filter channel of the PFs from a single channel to multiple channels, multiple CLUs can simultaneously be filtered out according to user’s demands. Owing to the different powers of the CLUs in different channels, suitable attenuations are applied to every channel to balance the power of the CLUs. After two PFs, EDFAs are used to amplify the extracted CLU signals, and a ODL is used for signal bit synchronization. Subsequently, an optical coupler (OC) is used to power couple the different outputs of PF1 and PF2. In this way, arbitrary three-input logic functions can be output directly.

 

Fig. 6. (a) Experimental setup of coupling array in three-input CLUs-PLA for generating arbitrary logic functions. PF: programmable filter; EDFA: erbium doped fiber amplifier; ODL: optical delay line; OC: optical coupler. (b) Measured temporal waveforms and eye diagrams, (c) BER measurements of input demodulated signal and combinational logic results, of the all-optical user-defined logic function, full adder, and full subtractor.

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Figure 6(b) shows the output temporal waveforms of the all-optical user-defined logic functions, full adder, and full subtractor. As for the user-defined logic functions, the logic levels of these output results are correct with clear data streams. We performed BER measurements of the input demodulated signal and output results of the all-optical user-defined logic device, as shown in Fig. 6(c). Power penalties at the BER of 10⁻⁹ for $F1$, $F2$, $F3$ and $F4$ are 0.42, 2.28, 6.51, and 5.35 dB, respectively. These positive power penalties indicate signal degradation caused by the noise superposition induced from power coupling of the CLUs. As for full adder and full subtractor, Fig. 6(b) shows that the logic 1 bits are not that even, since the level of logic one bits of each CLU is also not even, and the power cannot be optimized exactly to the same when the specific corresponding CLUs are coupled. From the BER curves of full adder and full subtractor in Fig. 6(c), the power penalties at a BER of 10⁻⁹ for Sum/Diff, Borrow, and Carry are 8.15 dB, 6.85 dB and 7.15 dB, respectively. The higher power penalties of these output results are mainly due to the disunity of logic ones. Thus, to achieve a better performance of the output results, the signal quality of the three-input CLUs should be further improved.

By using bidirectional FWM and wavelength spacing optimization, eight types of three-input CLUs can be generated simultaneously in one HNLF. As shown in Fig. 2, ten pump signals (i.e., C, A, B, $\bar{A}$, $\bar{B}$, and $\bar{C}$, $\bar{A}$, $\bar{B}$, A, $B$) must be used as the input signals of HNLF. According to Table 2, other researchers have reported that two types of three-input CLUs can be generated simultaneously with bidirectional FWM (Bi-FWM in Table 2) in the HNLF. In the scheme, six pump signals must be used as input signals of HNLF [24]. When A, B, C and $\bar{A}$, $\bar{B}$, $\bar{C}$ are the input signals, the two CLUs of $\textrm{ABC}$ and ${\bar{A}\bar{B}\bar{C}}$ can be obtained. To realize three-input PLA containing eight CLUs, 24 pump signals must be implemented based on four HNLFs. Compared with those of this scheme, the number of HNLFs and pump signals in our proposed scheme are much smaller, which help to simplify the computing system and greatly reduce power consumption.

Table 2. Comparison of State-of-the-Art All-Optical PLA System

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The two-input PLA(with four CLUs) in different schemes has widely been studied. As illustrated in Table 2, different two-input CLUs can be obtained with different nonlinear effects in the HNLF, SOA, and silicon waveguide. As previously mentioned, two-input PLA can only generate 16 different logic functions, whereas three-input PLA can generate 256 different functions. Thus, with this scheme, different logic functions can be obtained for future complex optical computing.

Moreover, the original pump signals and three-input CLUs are in nine wavelength channels as shown in Fig. 1(b). Most of the other seven wavelength channels are crosstalk signals due to the superposition of the converted lights generated by other FWM processes. Dispersing these converted lights over different wavelength channels will generate more CLUs without crosstalk, which requires an increased wavelength spacing of the pump signals and the adoption of nonlinear device with large FWM conversion bandwidth.

4. Conclusion

We have proposed and experimentally demonstrated simultaneous generation of a full set of three-input CLUs in only one nonlinear device via FWM. The three-input PLA with a full set of CLUs can greatly reduce the number of nonlinear devices and simplify the computing system. A series of combinational logic functions including, user-defined logic functions, full adder, and full subtractor have been experimentally demonstrated. Error-free performance for all logic operations at 40 Gb/s has been obtained. Power penalties at a BER of 10⁻⁹ for full adder and full subtractor are below 8.15 dB. The proposed PLA scheme, which helps to simplify the computing system and reduce power consumption, is an important scheme for future high-speed optical logic processing and complex optical computing. Moreover, owing to the rate transparency of FWM, the CLUs-PLA has the potential to be further extended to higher data rates.