1. Introduction

Recently, rapid emergence of new internet applications such as internet of things (IOT), augmented/virtual reality, cloud computing and storage has driven great demand for short-reach links in data centers (DCs) [1]. As a result, compute instances, IP traffic and storage capacity within DCs have increased 6, 10, 25-fold respectively from 2010 to 2018 [2], which brings about huge growth of electricity consumption. It is estimated that the energy consumption of information and communication technology (ICT) devices could reach 14% of total worldwide consumption by 2040 [3], among which data centers’ energy consumption accounts for 45% [4]. In order to realize “Green Communication” and achieve the “Sustainable Development Goals” [1], research on energy consumption modeling of short-reach optical transmissions is of vital significance [5].

Forward error correction (FEC) was firstly introduced in optical transmissions in 1988 [6]. Since then, FEC codes such as Reed-Solomon (RS) codes, Bose-Chaudhuri-Hocquenghem (BCH) codes, raptor codes and Low-Density Parity-Check (LDPC) codes have been widely used in optical transmissions [7–10]. Among the codes mentioned above, LDPC codes are extremely attractive for their capacity-approaching ability and message passing decoding mechanism, leading to numerous applications in various communication standards, such as WLAN (IEEE 802.11) [11], DVB-S2X [12] and Ethernet (IEEE 802.3) [13]. LDPC decoding has two different types of algorithms—hard-decision (HD) decoding and soft-decision (SD) decoding. Compared with complicated SD decoding, HD decoding has lower computational complexity, simpler hardware implementation, fewer energy consumption and smaller latency, although it has a certain loss of correction ability. Taking all these factors into consideration and balancing performance with energy consumption, employing LDPC codes with HD decoding becomes an extremely attractive coding strategy in short-reach optical transmission systems. Additionally, irregular Quasi-Cyclic (QC) LDPC codes are much more widely adopted for their efficient hardware implementation [14].

Shannon theorem, combined with modern coding theoretic constructions [15], has provided a method which contributes to minimize transmit power under ideal conditions. However, when discussing minimum total energy consumption under practical communication channel with specific codes, decoding algorithms and implementation technology of the hardware circuits, the problem is extended to a multi-objective optimization concept. Increase of transmitted optical power (TOP) at the transmitter improves the signal-to-noise ratio (SNR) at the receiver, which means a smaller pre-FEC bit error rate (BER) for decoding, leading to less decoding iterations and smaller circuit activity coefficient. Hence, there is a tradeoff between the energy consumption of transmitters and LDPC decoding circuits. In this work, we focus on an optimization question that is motivated by energy consumption: how to choose appropriate LDPC code and decoding algorithm to consume minimum energy in short-reach optical transmissions with target transmission rate and error probability? To provide a convincing answer, we introduce a comprehensive energy consumption model and carry on several analysis based on it.

Based on Thompson’s theoretical models of very-large-scale integration (VLSI) implementations [16], several works have been done exploring fundamental scaling limits on the energy consumption of communication systems using LDPC codes [17–20]. These works abstract energy consumption models of processing nodes [17,20] and wires [18–20] in the regular LDPC VLSI decoders and show a fundamental tradeoff between transmitting and decoding power over AWGN channel.

In this work, our discussion is extended to energy consumption modeling of short-reach optical transmissions using irregular QC-LDPC codes with Gallager A/B decoders. As short-reach optical transmissions normally concern short range (SR) fiber-optic links connecting servers within DCs and long range (LR) inter-DCs links [21], we derive a new and complete energy consumption model including the energy consumption of optical transmitters and VLSI decoders which considers channels’ characteristics in these two scenarios. Probability distributions of bit errors and wires’ activity factor during irregular QC-LDPC codes’ decoding iterations as well as the average number of iterations are theoretically emulated using density evolution algorithm. In addition, empirical models of decoding circuits are constructed using post-layout circuit simulation for processing nodes sub-circuits. Total energy consumption using LDPC codes promoted in IEEE P802.3ca [13] and 3GPP TS38.212 [22] with Gallager’s A/B decoders is compared based on the proposed energy consumption model.

Numerical results show that, in SR scenario suffering slight bandwidth limit, such as 50Gbaud OOK and 25Gbaud PAM4 transmissions, uncoded strategy consumes far less energy than adopted LDPC-coded strategies. While in severely band-limited SR case when FEC is necessary, there exists a balance between energy consumption of transmitter and decoder in 70Gbaud OOK and 35Gbaud PAM4 transmissions. Meanwhile, longer LDPC codes with similar rate are proved to consume less power for their better error correction ability. In LR scenario, power differences among coding strategies are found grow significantly as pre-BER reaches the error correction threshold, which reflects the great influence of error correction threshold on the energy consumption of LDPC decoders. At last, it is exhibited that the decoding algorithm suiting for LDPC codes changes with the pre-BER, highlighting the significance of our energy consumption modeling to evaluate system’s energy consumption.

2. Energy consumption modeling of short-reach optical transmission systems

As shown in Fig. 1, differing from long-haul optical transmission systems, short-reach optical transmission systems are highly sensitive to component costs. As a result, low-cost optical transmitters such as vertical cavity surface-emitting lasers (VCSEL) and electro-absorption modulators (EAM) integrated with distributed feedback (DFB) lasers are preferred. Besides, simple non-return to zero-on-off-keying (NRZ-OOK), pulse-amplitude modulation (PAM) formats and direct-detection (DD) with PIN PD or avalanche photo-diodes (APD) are much preferred. Generally, no optical amplifier or repeater is employed. As for digital signal processing (DSP), simplified DSP such as feed forward equalizer (FFE) and decision feedback equalizer (DFE) is much desired. Moreover, there is an assumption to omit the clock recovery circuit (CRC) at receiver due to its large energy consumption, in which case DSP is not feasible at receiver and the only remaining means of error correction is the FEC technique.

 

Fig. 1. Block diagram of short-reach optical transmission systems.

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Establishing an energy consumption model containing all the components within transmission systems for joint multi-objective optimization is an overly complex and difficult task [20]. Based on our original intention to select appropriate LDPC code and decoding algorithm for short-reach optical transmissions, we divide the contained components into major and minor parts according to whether the component’s energy consumption affects the choice of LDPC code and decoding algorithm, as shown in Fig. 1. Specially, LDPC’s encoder is classified into the minor part for its small energy consumption compared to decoder considering existing research on reducing the complexity of LDPC’s encoding and the iterative characteristics of LDPC’s decoding [17].

Schematic diagram of the proposed model is shown in Fig. 2. Based on the existing transmitting and decoding energy consumption model in the AWGN channel using regular LDPC [17–20], our modeling including energy consumption model of optical transmitters and processing node as well as wire in the irregular LDPC decoding circuits. Meanwhile, density evolution analysis is adopted for the theoretically emulation of HD decoding process of irregular LDPC. And parallelism is considered to solve the mismatch between the target transmission rate and the throughput of a single decoding circuit. Besides, optical channel characteristics are introduced through VPI photonics-based channel simulation and post-layout VLSI circuit simulation is conducted to get sub-circuits parameters. Factors considered in our energy consumption modeling include modulation format, type of optical transmitter, optical channel characteristics, LDPC code’s parameters, decoding algorithm, equalization algorithm, circuit’s implementation technology as well as architecture, target transmission rate and target BER. And the order of modulation format, transmitter type and amplitude of driving current/voltage are denoted as M, L_type and I_mod/V_mod respectively. Length and degree distribution of LDPC code are denoted as $n,\textrm{ }\lambda (x )\textrm{ and }\rho (x)$ respectively. ${\psi _v}$ and ${\psi _c}$ are the mapping functions of decoding at variable node and check node. N_a is the average carrier density of laser. r_th is the target transmission rate. p_pre, p_post, N_iter and ε are the pre-BER, post-BER, average iteration number and wires’ activity factor in decoding. A_c, T_c, P_c, A_v, T_v and P_v are decoder’s sub-circuits parameters. P_node, P_wire, T_node and T_wire are average power and latency of nodes and wires respectively. Power consumptions of transmitter and decoding circuits at receiver are denoted as ${P_l}$ and ${P_d}$ respectively. And the total power, denoted as ${P_{tot}}$, is calculated by

 

Fig. 2. Schematic diagram of proposed energy consumption model of short-reach optical transmission systems.

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The details of the proposed energy consumption model as shown in Fig. 2. i.e. energy consumption models of optical transmitter, processing node and wire of decoding circuits are introduced in Sections 2.1 and 2.2 respectively. Section 2.3 exhibits parallelism and density evolution analysis in detail. And channel simulation as well as post-layout simulation are stated in Sections 3.1 and 3.2 respectively.

2.1 Energy consumption modeling of optical transmitters

Energy consumption modeling of optical transmitters focuses on the influence of driving current/voltage amplitude and modulation format on their total power consumption. VCSEL and EML (EAM integrated with DFB laser) are two main kinds of lasers used in short-reach optical transmission systems. As VCSEL is a kind of direct-modulated lasers while EML is a kind of externally-modulated lasers, energy consumption of these two kinds of lasers differs, which will be discussed in turn.

2.1.1 Energy consumption modeling of VCSEL

An equivalent electrical circuit of VCSEL is established and shown in Fig. 3(a) [23], which consists of three parts—source, wire and pad, and internal VCSEL. As a kind of direct-modulated lasers, VCSEL’s TOP is proportional to the drive current passing through its cavity—${I_c}$ in Fig. 3(a), which comprises bias current denoted as ${I_B}$ and modulation current denoted as ${I_{Mod}} = {I_i},i = 1,2,\ldots ,M$ (M is the order of modulation format). The peak-to-peak value of ${I_{Mod}}$ is denoted as ${I_{pp}}$.

 

Fig. 3. Equivalent electrical circuit of (a) VCSEL (b) electro-absorption modulator.

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At the internal VCSEL region, ${R_c}$, ${C_c}$ and ${I_c}$ denote resistance, capacitance and drive current of laser’s cavity respectively, ${R_{refl}}$ denotes resistance of the Bragg reflectors, ${I_a}$ and ${U_a}$ denote current and voltage across the active layer. According to network analysis based on circuit theory, we get

And ${U_c}$ is the voltage associated with flow of carriers, which can be calculated by

Then, at the wire and pad region, ${R_w}$, ${C_w}$, ${L_w}$ and ${I_w}$ denote its resistance, capacitance, inductance and current respectively. Similarly, we get

Meanwhile, at the source region, let ${R_s}$ , ${C_s}$ , ${U_s}$ and ${I_s}$ denote its resistance, capacitance, voltage and current respectively. Thus, we get

Based on formulas (6) and (7), we calculate ${I_s}$ and ${U_s}$ according to ${I_w}$ .

Finally, the total electrical power of the whole circuit can be calculated by

Thus, based on formulas (2–8), power consumption of the VCSEL circuit ${P_e}$ at different ${I_c}$ is obtained and ${P_l}$ is given by

2.1.2 Energy consumption modeling of EML

As a kind of externally-modulated lasers, output optical power of EML is adjusted by changing the voltage applied to the EAM while fixing output optical power of the DFB inside EML. Researchers in [25] showed that the extra energy consumption, apart from energy consumption of DFB, mainly comes from (i) charging and discharging of the device capacitance (dynamic energy consumption), and, (ii) photocurrent flow (static energy consumption).

To analyze energy consumption from capacitive charging and discharging, an equivalent electrical circuit of modulator is shown in Fig. 3(b). Total voltage, denoted as ${V_{tot}}$ , applied to the modulator comprises additional (reverse) bias voltage, denoted as ${V_B}$ , and modulation voltage, denoted as ${V_{Mod}} = {V_i},i = 1,2,\ldots ,M$ (M is the order of modulation format). The peak-to-peak value of ${V_{Mod}}$ is denoted as ${V_{pp}}$ . The modulator’s capacitance is denoted as ${C_m}$ . And energy consumption per symbol at NRZ-OOK modulation is given as

As the symbol rate of the transmission system is denoted as ${R_{th}}$ , thus, the power consumption from capacitive charging and discharging, denoted as ${P_c}$ , can be calculated by

As for energy consumption from photocurrent at modulator, the main mechanism is that absorption of the input optical power generates photocurrent, leading to energy consumption as photocurrent flowing over the biased region. For the convenience of expression, the input optical power of modulator which is also the output optical power of DFB laser is denoted as ${P_{ino}}$ . And the optical power absorption function of ${V_{tot}}$ is denoted as $\eta ({{V_{tot}}} )$ . So the power consumption from photocurrent can be expressed as

Ultimately, total power consumption of the EML is

2.2 Energy consumption modeling of LDPC decoding circuit

Energy consumption modeling of LDPC decoding circuit contains modeling of the processing nodes (variable nodes and check nodes) and the wires connecting them. In this section, impact of degree distribution of irregular LDPC code and decoding algorithm on the total circuit power, with given target throughput, pre-BER and post-BER, is discussed in detail. Our model is based on Tanner graph and is an extension and adaptation of Ganesan’s model [20]. Several preliminary assumptions to support modeling and density evolution analysis are shown below:

As an example, Fig. 4(a) shows the tanner graph for a (9, 6) LDPC code and Fig. 4(b) shows its decoder’s corresponding fully-parallel layout. Each vertex in the Tanner graph corresponds to a processing node in the layout and each edge in the Tanner graph corresponds to a wire connecting processing nodes.

 

Fig. 4. (a) The Tanner graph of a (9, 6) LDPC code and (b) its decoder’s fully parallel layout.

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2.2.1 Energy consumption modeling of processing nodes in decoding circuit

Generally, energy consumption of a VLSI circuit consists of dynamic part (which is proportional to the activity-factor and the clock-frequency), and static part (which is not) [28]. However, the static part is found to account for less than 1% of the total energy consumption in post-layout simulation [20]. Therefore, with a little loss of accuracy, our research is absorbed in the dynamic power of the processing nodes.

To begin with, following the literature, the number of variable nodes and check nodes are denoted as $n$ and $m$ , respectively. Hence, code rate of the irregular LDPC is $R = {k / n}$ , where $k = n - m.$ Meanwhile, the degree distribution of variable nodes and check nodes is denoted as

So the number of variable nodes of degree $i$ and check nodes of degree $j$ can be expressed as

Then, dynamic power, physical area and critical-path delay of variable nodes’ and check nodes’ sub-circuits with different degree are denoted as ${P_{v,i}},\textrm{ }{A_{v,i}},\textrm{ }{T_{v,i}}\textrm{ }(i = 2,3,\ldots ,{d_v})$ and ${P_{c,j}},\textrm{ }{A_{c,j}},\textrm{ }{T_{c,j}}\textrm{ }(j = 2,3,\ldots ,{d_c})$ respectively. And values of these parameters are obtained by post-layout simulation. At each iteration of decoding, processing nodes calculate the output message based on the input message and passes it to all connected nodes, consuming constant energy. The total energy of variable nodes denoted as ${E_v}$ and check nodes denoted as ${E_c}$ during one iteration are

Thus the average power of all processing nodes, denoted as ${P_{node}}$ , can be calculated by

In general, the critical path for a full decoding iteration starts from a setup time and a CLK-Q delay of variable node, then an interconnect delay, then a check node delay ${T_{c,j}}$ , then another interconnect delay, and finally a variable-node delay ${T_{v,i}}$ . In the post-layout simulation, the setup time and the CLK-Q delay are accounted for in ${T_{v,i}}$ , so $\overline T$ can be calculated by

2.2.2 Energy consumption modeling of wires in decoding circuit

Different from processing nodes, wires consume energy whenever they are “switched”, namely when the message along the wire changes its value [20]. Hence, the probability of wires consuming energy depends on the BER at current iteration. With the progress of the iterative decoding, BER is gradually reduced and so as the number of wires consuming energy. We define the proportion of energy-consuming wires in all wires during each iteration as the activity factor ${\varepsilon ^{(l)}},\textrm{ }l = 1,2,\ldots ,{N_{iter}}$ , where ${N_{iter}}$ is the number of iterations. Values of these two parameters depend on the BER and bit-flip rule, and are derived by density evolution analysis.

We start by calculating the power of wires in each iteration. Average length of the wires is denoted as ${l_{wire}}$ . As for its estimation, an assumption needs to be made that the total area of the decoding circuit is the sum of processing nodes’ physical area which is in square arrangement. After that, estimation can be made by [29]

It is shown that formula (21) is a good approximation for highly-parallel logic, which applies to our work. Wire’s capacitance per unit length is denoted as ${C_{unit}}$ . So the average capacitance of wire, denoted as ${C_{wire}}$ , is calculated by ${C_{wire}} = {C_{unit}} \cdot {l_{wire}}.$ Additionally, the supply voltage of the decoding circuits is denoted as ${V_{DD}}$ , and the number of wires is denoted as ${N_{wire}}$, which is given by ${N_{wire}}=n/{ \smallint} {_0^1 \lambda (x)dx}$. Explicitly, the total power of wires in each iteration is given by

As for the calculation of wire’s delay, firstly, average minimum width and sheet resistance of the decoding circuit are denoted as ${w_{avg}}$ and ${R_{sq}}$ respectively. And the average resistance of wire, denoted as ${R_{wire}}$ , is calculated by ${R_{wire}} = {{({{R_{sq}} \cdot {l_{wire}}} )} / {{w_{avg}}}}.$ The average interconnect delay of wire is then estimated assuming a distributed Elmore model [29]:

Complementally, electrical parameters used in this section, such as ${C_{unit}}$ , ${w_{avg}}$ and ${R_{sq}}$ , are calculated using design rule information [30] and are assumed as constants.

Lastly, the power of a single decoder is calculated using

2.2.3 Parallelism and density evolution analysis

After obtaining the power of a single decoder, as mentioned before, parallelism problem is discussed. Above all, throughput of a single decoder is denoted as ${r_u}$ , and transmission bitrate of the system is denoted as ${r_{th}}$ . Thus we get ${r_u} = {k / {({{N_{iter}} \cdot \overline T } )}}$ and ${r_{th}} = {R_{th}} \cdot {\log _2}M$ , where $M$ is the order of the modulation format. Then, number of decoders, denoted as ${N_u}$ , to exceed the required throughput is given by ${N_u} = \lceil{{{{r_{th}}} / {{r_u}}}} \rceil .$

Due to the round up operation above, the clock period of each parallel decoders is adjusted until the total throughput of the parallel combination is exactly ${r_{th}}$ . As a result, the total power of parallel decoders is multiplied by the appropriate scaling factor $\beta = {{{r_{th}}} / {({{N_u} \cdot {r_u}} )}}$ , given as

Eventually, our discussion comes to a vital question: How to obtain ${N_{iter}}$ and ${\varepsilon ^{(l)}}$ at each iteration with different decoding algorithms when given pre-BER and post-BER? In this work, density evolution analysis is adopted to respond to this problem and the flow chart of the decoding recursion is shown in Fig. 5.

 

Fig. 5. Flow chart of the decoding recursion.

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Notably, decoding algorithms discussed in this work are the two major HD algorithms—Gallager A and Gallager B decoding algorithms. According to the symmetry condition of channel and mapping functions, the entire behavior of the decoders can be predicted from behavior assuming transmission of the all-zero codeword. The pre-BER and post-BER of iteration decoding are denoted as ${p_{pre}}$ and ${p_{post}}$ respectively. The mapping functions at the variable node and the check node are denoted as ${\psi _v}$ and ${\psi _c}$ respectively. At the message passing process from variable nodes to check nodes in the ${l_{th}},\textrm{ }l = 1,2,\ldots ,{N_{iter}}$ iteration, let $p_{0,i}^{(l )}$ , $p_{1,i}^{(l )}$ denote the probability that 0, 1 are sent from variable nodes of degree $i$ , $P_0^{(l )}$ , $P_1^{(l )}$ denote the average probability of 0, 1 to be sent, whose weight is the proportion of variable nodes of degree $i$ in all variable nodes, and $\varepsilon _{v,i}^{(l)}$ denote the activity factor of wires connected to variable nodes of degree $i$ . Meanwhile, at the message passing process from check nodes to variable nodes in the ${l_{th}}$ iteration, $q_{0,j}^{(l )}$ , $q_{1,j}^{(l )}$ , $Q_0^{(l )}$ , $Q_1^{(l )}$ and $\varepsilon _{c,j}^{(l)}$ denote similar meaning corresponds to that of $p_{0,i}^{(l )}$ , $p_{1,i}^{(l )}$ , $P_0^{(l )}$ , $P_1^{(l )}$ and $\varepsilon _{v,i}^{(l)}$ .

At the beginning of decoding, due to the independent and identically distributed (iid) of all nodes, $p_{1,i}^{(1 )}$ , $P_1^{(1 )}$ are initialized to ${p_{pre}}$ and $p_{0,i}^{(1 )}$ , $P_0^{(1 )}$ are initialized to $1 - {p_{pre}}$ . Besides, all processing nodes’ value is initialized from 0 and the modulated symbols conform to uniform distribution, so $\varepsilon _{v,i}^{(l)}$ , $\varepsilon _{c,j}^{(l)}$ are initialized as 0.

Next, in the recursive calculation of the nodes’ probability distribution, mapping functions of the decoding algorithms are the main factor affecting the density evolution analysis.

In the Gallager A decoding algorithm, ${\psi _c}$ is defined as

Based on the mapping functions above and $P_0^{(1 )}$ , $P_1^{(1 )}$ , recursion formulas of check nodes’ probability distribution, when $l = 1,2,\ldots ,{N_{iter}}$ , are given by

Then, the weighted average probability of check nodes is calculated using

Subsequently, the derivation comes to the recursion formulas of variable nodes’ probability distribution, when $l = 1,2,\ldots ,{N_{iter}}$ . Based on $Q_0^{(l )},Q_1^{(l )},{\psi _v}$ we obtain

In the same way, the weighted average probability of variable nodes is then calculated using

Meanwhile, activity factors of energy-consuming wires engaged in the separate two message passing processes at each iteration, when $l = 2,\ldots ,{N_{iter}}$ , are calculated according to the flipping probability of check nodes and variable nodes, which are given by

Thus, activity factors of energy-consuming wires at ${l_{th}}$ iteration is

In the end, the termination condition of the decoding recursion is $P_1^{({l + 1} )} \le {p_{post}}$ , after which we assign the number of passed iteration $l$ as ${N_d}$ . However, as $P_1^{({{N_d} + 1} )}$ is unequal to ${p_{post}}$ in most cases, for the sake of fairness in comparison, weight factor $\alpha$ is introduced, which is calculated by:

Then, activity factor at last iteration ${\varepsilon ^{({N_d})}}$ are multiplied by $\alpha$ , and the number of iteration ${N_{iter}}$ is modified as

In the Gallager B decoding algorithm, the mapping function at check nodes is same as Gallager A decoding algorithm, while variable nodes’ mapping function is different and defined as

As a result, check nodes’ probability distribution is calculated using formulas (28)–(31), and recursion formulas of variable nodes’ probability distribution at each iteration are given by

Similarly, recursion formula of the activity factor in the message passing process from check nodes to variable nodes at ${l_{th}},\textrm{ }l = 2,\ldots ,{N_{iter}}$ iteration is given by

It is worth noting that formulas (34), (35), (37)–(40) still apply to Gallager B decoding algorithm.

3. Key parameters for energy consumption evaluation by the proposed model

In Section 2, VCSEL and EML’s power consumption under different modulation formats at given transmission rate is firstly analyzed. Then, energy consumption model of LDPC decoding circuit with given transmission rate and error probability is proposed. Finally, for the evaluation of total power, error probability performance under diverse channel characteristics, transmission rate and transmitted optical power needs to be analyzed. In previous work [17–20], this step is conducted based on Gaussian model assuming that it’s AWGN channel with fixed attenuation, which is not in line with short-reach optical transmissions. Thus, in this work, simulation on two scenarios of short reach optical transmission is conducted using VPI photonics software, and the key parameters for our energy consumption analysis in the two scenarios are shown in Section 3.1. And in Section 3.2, details of CAD implementation and post-layout circuit simulation are introduced.

3.1 Parameters of short reach optical channels

As shown in Fig. 6, we analyze two scenarios of short reach optical channels—VCSEL-MMF based SR system for intra-DC communication, and EML-SSMF based LR system for inter-DC communication.

 

Fig. 6. Simulation schematics of short reach optical channels in two scenarios.

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In scenario-1, we focus on the optimization question: when given target BER and transmission rate, how to choose appropriate VCSEL’s driving current range, LDPC code and decoding algorithm to consume minimum energy when using OOK and PAM4 modulation formats?

At the transmitter, a 850 nm VCSEL is employed, whose electrical parameters at ambient temperature 25 °C are listed in Table 1.

Table 1. Electrical parameters of VCSEL’s equivalent electrical circuit

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Value of VCSEL’s bias current is set to be twice of the peak-to-peak value of modulation current, ranging from 8 mA to 19 mA. The measured average carrier density of VCSEL’s cavity and the following calculated VCSEL’s electrical power as functions of the driving current at ambient temperature 25 °C are shown in Fig. 7.

 

Fig. 7. Measured average carrier density of VCSEL’s cavity and following calculated electrical power as functions of the driving current at ambient temperature 25 °C.

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It can be seen that the electrical power of VCSEL increases approximately linearly with the increase of the driving current. The transmission channel is typical 100 m OM4 multi-mode fiber (MMF), whose attenuation is $2 \times {10^{ - 3}}{{\textrm{dB}} / \textrm{m}}$ . As for the DSP equalization at receiver, a 7-tap FFE is adopted in 70Gaud OOK and 35Gbaud PAM4 transmission, and no DSP is adopted in 50Gbaud OOK and 25Gbaud PAM4 transmission. After that, signal is demodulated to calculate the BER, which is ${p_{pre}}$ of the following LDPC decoder.

Meanwhile, in scenario-2, we discuss the influence of the choice of coding strategies on the total energy consumption at different power budgets. In order to eliminate the influence of transmitter’s energy consumption in the discussion, we fix EML’s TOP and the absorption function of the EAM. At the transmitter, a 1310 nm, $10\textrm{MHz}$ linewidth EML consisting of an EAM and a DFB is used. The output optical power of the DFB is fixed as 4 dBm and the absorption function of the EAM is $\eta (V )= 0.1 + 0.225V.$ The 3dB bandwidth of the EML is $\textrm{37}\textrm{.5GHz}$ for 50Gbaud NRZ transmission. And bias voltage ${V_B}$ as well as peak-to-peak value of modulation voltage ${V_{pp}}$ are set as 0 V and 4 V respectively. EAM’s capacitance ${C_m}$ is 25 fF. Ambient temperature is also 25 °C. The transmission channel is 20km standard single-mode fiber (SSMF), whose attenuation is $0.35 \times {10^{ - 3}}{{\textrm{dB}} / \textrm{m}}$ , and the nonlinear index is $5 \times {10^{ - 6}}{{\textrm{s} / \textrm{m}}^2}$ . At the receiver, an APD is used after which signal is demodulated to calculate ${p_{pre}}$ of the following LDPC decoder with no FFE is used. The target BER ${p_{post}}$ in both scenarios is $1 \times {10^{ - 12}}$ .

We emphasize that the two scenarios above are chosen to show the concept: when given channel and communication quality requirement, we can discuss diverse combinations of LDPC codes, decoding algorithm and transceivers’ parameters from the perspective of energy and choose the one with the lowest energy consumption. Although they may not cover all the possibilities of short reach optical transmissions, our goal is to show that it is feasible and can be popularized to discuss the optimal problem of energy consumption in scenarios where LDPC with HD decoding algorithm may be used.

3.2 Parameters estimation by post-layout circuit simulation

Flow of CAD implementation and post-layout circuit simulation in this paper is implemented in hierarchical manner [20].

Firstly, behavioral Verilog descriptions of processing nodes are mapped to standard units using logic synthesis. In this process, constraints and mapping effort, which are the inputs of the synthesis tool, determine the delay, power, area, and structure of synthesized logic. For the fairness of comparison, only minimum delay and minimum power are with needed constraints and the mapping effort is set to with highest possibility.

Then, after placed-and-routed using physical design tool, physical area of processing nodes’ circuits ${A_{v,i}}\textrm{ }(i = 2,3,\ldots ,{d_v})$ and ${A_{c,j}}(j = 2,3,\ldots ,{d_c})$ are obtained.

Subsequently, post-layout simulation is performed, using extracted RC parasitic and typical corners for the Synopsys 32/28 nm HVT CMOS process [30] with a supply voltage of 0.78 V. The critical-path delays ${T_{v,i}}\textrm{ }(i = 2,3,\ldots ,{d_v})$ and ${T_{c,j}}\textrm{ }(j = 2,3,\ldots ,{d_c})$ are obtained using post-layout static timing analysis. And post-layout power analysis is performed to obtain the average power consumption ${P_{v,i}}\textrm{ }(i = 2,3,\ldots ,{d_v})$ and ${P_{c,j}}\textrm{ }(j = 2,3,\ldots ,{d_c})$ with a “virtual clock” of period ${T_{v,i}}\textrm{ }(i = 2,3,\ldots ,{d_v})$ and ${T_{c,j}}\textrm{ }(j = 2,3,\ldots ,{d_c})$ respectively.

Additionally, numerical values of ${C_{unit}}$ , ${w_{avg}}$ and ${R_{sq}}$ are calculated as $\textrm{2}\textrm{.695} \times {10^{ - 8}}{\textrm{F} / \textrm{m}},\; \textrm{0}\textrm{.0551}\mu \textrm{m}$ and $\textrm{0}\textrm{.1}{\Omega / {\textrm{sq}}}$ with information in [30].

4. Energy consumption evaluation of short reach optical transmissions

Table 2 shows the degree distribution and parameters of LDPC codes used in the energy consumption evaluation by our proposed model. It can be seen that the rates of all codes are around 0.8 and the lengths of Code 2-4 are similar while length of Code-1 is relatively shorter. And we compare energy consumption using Code-1, 3 and Code 2-4 in the SR and LR scenarios respectively.

Table 2. Degree distribution and parameters of adopted LDPC codes

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4.1 VCSEL-MMF based short range transmission

In the short range transmission, the total power using Code-1 and Code-3 with Gallager A/B decoders are calculated in both 50/70Gbaud OOK and 25/35Gbaud PAM4 scenarios. Besides, BER performance under different bias current are exhibited.

As shown in Fig. 8, in the 50Gbaud OOK and 25Gbaud PAM4 transmissions, no FFE is used as system’s bandwidth limit is slight. With the increase of bias current, ${p_{pre}}$ decreases from approximately $1 \times {10^{ - 3}}$ (near the HD error correction threshold of Code-1 and Code-3) down to $1 \times {10^{ - 12}}$ (when uncoded transmission is achievable). One can observe that the total power differences of uncoded transmission and coded transmission near the HD error correction threshold with optimal coding strategy are 16.34mW and 27.96mW respectively, which means that increasing the output power of VCSEL is a much more energy efficient way than using LDPC techniques when bandwidth limit is slight. The huge total power near the HD error correction threshold is because the large number of decoding iterations and the consequent high energy consumption of the decoders. Thus, uncoded transmission is a more energy-saving strategy in transmission with slight bandwidth limit. However, what's interesting is that the minimum total power, when ${p_{pre}}$ is around $2 \times {10^{ - 8}}$, is 2.08mW less than uncoded transmission in the 50Gbaud OOK transmission even though this BER is not a common application scenario for LDPC. Meanwhile, Code-3 is observed to consume less 3.22mW and 2.48mW than Code-1 respectively near the HD error correction threshold, which reflects that code with longer code length when the code rate is close has lower energy consumption due to better error correction performance and a smaller number of decoding iterations. On the other hand, it can be seen that the minimum total power in the 50Gbaud OOK transmission is larger than that in the 25Gbaud PAM4 transmission at same ${p_{pre}}$ , clarifying the energy-efficiency of PAM4 compared to OOK modulation format.

 

Fig. 8. Total power using Code-1 and Code-3 with Gallager A/B decoding algorithm (left) and pre-BER of decoder (right) at different bias current in (a) 50Gbaud OOK and (b) 25Gbaud PAM4 transmission without FFE.

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Then, in case with more severe bandwidth limit, FFE is introduced in the 70Gbaud OOK and 35Gbaud PAM4 transmissions, as shown in Fig. 9. In this case, uncoded transmission is unachievable and VCSEL’s bias current becomes larger due to the requirement of larger output power. Similarly, Code-3 still consume less 2.73mW and 5.32mW than Code-1 respectively near the HD error correction threshold. Then, with the increase of bias current, the total power gradually decreases to the minimum power point when bias current is 18mA and 14mA respectively, and the power differences are 16.08mW and 15.83mW respectively. Nevertheless, what differs is that increase of total power with the increase of bias current occurs after the minimum point in both two transmissions. And the reason for the fluctuation is that the average carrier density of VCSEL’s cavity becomes stable when its bias current is set ranging from 8 mA to 19 mA as shown in Fig. 7. Thus, the relationship between VCSEL’s power and its bias current can be considered almost linear according to formulas (2)–(9). Meanwhile, we can see that the pre-BER of decoder reduces rapidly with the increase of bias current, leading to the decrease of needed number of decoding iterations and so as the decrease of decoding circuits’ power. As a result, the reduction of decoding circuits’ power will change from greater than the increment of VCSEL’s power to less than it with the increase of bias current, leading to the fluctuation of total power, which revealing a balance between energy consumption of transmitters and decoders. Besides, the minimum total power in the 70Gbaud OOK transmission is still larger than that in the 35Gbaud PAM4 transmission at same ${p_{pre}}$ , clarifyiny that PAM4 is more energy-saving than OOK.

 

Fig. 9. Total power using Code 1 and Code-3 with Gallager A/B decoding algorithm (left) and pre-BER of decoder (right) at different bias current in (a) 70Gbaud OOK and (b) 35Gbaud PAM4 transmission with a 7-tap FFE.

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4.2 EML-SSMF based long range transmission

Differing from simulations introduced in Section 4.1, in long range transmission, the output power of the transmitter is normally fixed and system’s power budget is a matter of concern. A typical number is 29dB, which is N1 power budget [21]. Therefore, in this part of the simulation, we fix the output power of the EML and evaluate the total power using diverse coding strategies at different ROP. 50G optics-based 50Gbaud OOK transmission without FFE are simulated. Total power using Code 2-4 with Gallager A/B decoding algorithm is calculated around N1 power budget respectively.

As shown in Fig. 10, total power using the three similar rate codes with Gallager A/B decoder at 28.9dB and 29.2dB power budgets is calculated. Among them, Code-3 using Gallager B decoder consumes minimum power which is labeled as Min ${P_{tot}}$ in the figure. And the power differences between Code-2, Code-4 and the minimum power can be as larger as 26.82mW and 9.44mW at 29.2dB power budget, while decreases to 4.24mW and 3.46mW at 28.9dB power budget. This is because ${p_{pre}}$ at 29.2 budget has almost reached the error correction threshold of Code 2-4. As a result, differences between numbers of decoding iterations among coding strategies get bigger, as shown in Fig. 10(a). Besides, it is worth noting that the energy consumption of almost all decoders doubles as power budget increases from 28.9dB to 29.2dB, suggesting that letting LDPC codes work near their error correction threshold is may not be an energy-saving idea.

 

Fig. 10. Total power using Code 2-4 with Gallager A/B decoding algorithm (left) and pre-BER of decoder (right) at different ROP in 50 G optics-based 50Gbaud OOK transmission without FFE.

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Finally, to investigate the trend of average number of decoding iterations and power difference between Gallager A/B decoder as ${p_{pre}}$ approaches error correction threshold, another simulation at two transmission rates for Code 1-4 is conducted, as shown in Fig. 11. It can be seen that, the average numbers of iterations of Code 1-4 increase from near 0.9 to 10 (range from 8.9 to 13) as ${p_{pre}}$ increases from $1 \times {10^{ - 8}}$ to $1.4 \times {10^{ - 3}}$ . Besides, the average number of iterations using Gallager A algorithm is generally larger than that of Gallager B algorithm (range from 0.2% to 7.5% for Code 1 when ${p_{pre}}$ is within $1 \times {10^{ - 7}}$ to $1 \times {10^{ - 3}}$ , range from 0.9% to 20.8% for Code 2, 3 at all ${p_{pre}}$, range from 0.6% to 9.7% for Code 4 when ${p_{pre}}$ is within $1 \times {10^{ - 6}}$ to $1.4 \times {10^{ - 3}}$ and $1 \times {10^{ - 8}}$), as the convergence rate of Gallager B algorithm is normally faster. However, several exceptions occur when the average number of iterations using Gallager B algorithm become larger (15.3% and 26.1% for Code 1 when ${p_{pre}}$ is $1.4 \times {10^{ - 3}}$ and $1 \times {10^{ - 8}}$, 2.2% for Code 4 when ${p_{pre}}$ is $1 \times {10^{ - 7}}$), the reason is that the probability of error propagation of Gallagher B algorithm is higher thus more decoding iterations are needed when error propagation occurs. As the throughput of the unit decoder is inversely proportional to the average number of iterations and the total power of the decoder is inversely proportional to the throughput of the unit decoder, it can be inferred that the total power of the decoder is proportional to the average number of iterations, which explains the reason for the rapid increase in decoders’ power with the increase of ${p_{pre}}$ . Meanwhile, difference of power using Gallager A/B decoding algorithm at 50/70 Gbps throughput for Code 1-4 is shown in Fig. 11(b). An interesting phenomenon is revealed that Gallager A and B decoding algorithm wins (consuming less power) under different circumstances, which depends on the code and ${p_{pre}}$ . Thus, the optimization of total energy consumption using LDPC is a complex problem affected by many factors with no fixed optimal solution, justifying the significance of modeling and analysis of specific scenarios.

 

Fig. 11. (a) Number of iterations with Gallager A/B decoding algorithm and (b) difference of power with Gallager A/B decoding algorithm (Gallager B decoders’ power minus Gallager A decodes’ power) in 50/70 Gbps rates at different pre-BER for Code 1-4.

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5. Conclusion and discussion

In this paper, we establish an energy consumption model of short-reach optical transmission using QC-LDPC codes with HD decoding algorithms. The method of calculating the energy consumption of VCSEL and EML is presented. A density evolution analysis based decoding circuit model inspired by the existing ASIC node and wire model for HD-decoded irregular LDPC is proposed. Post-layout simulation is employed to derive the Gallager A/B decoder’s sub-circuit parameters. Using the proposed model, total energy consumption with LDPC codes 1-4 promoted in IEEE P802.3ca and 3GPP TS38.212 is evaluated in VCSEL-MMF based 50/70Gbaud OOK and 25/35Gbaud PAM4 SR transmission as well as EML-SSMF based 50Gbaud OOK LR transmission. We show that in the SR scenario, uncoded strategy is an extremely energy-saving choice compared to LDPC-coded strategies in slight band-limited case (consuming 16.34 mW and 27.96 mW less power at 50Gbaud OOK and 25Gbaud PAM4 transmission). Meanwhile, in severely band-limited case (70Gbaud OOK and 35Gbaud PAM4 transmission), a tradeoff between energy consumption of transmitter and decoder exists when FEC is necessary. And we present that PAM4 is more energy-saving than OOK in SR scenario. On the other hand, in the LR scenario, we fix energy consumption of transmitter to analyze the power differences among coding strategies, which grow significantly as pre-BER approaches the threshold. It is reflected that error correction threshold has great influence on the energy consumption of LDPC decoders due to its intimate connection to the average number of decoding iterations. It is provided that LDPC codes with longer length consume less power for their better error correction ability. Besides, Gallager B decoder is more energy-saving in most cases when error propagation rarely occurs. Among all the discussed coding strategies, Code-3 with Gallager B decoder consumes minimum power in both SR and LR cases. Ultimately, we reveal the necessity of selecting appropriate coding strategy as decoding algorithm suiting for LDPC codes differs in different scenarios, justifying the significance of modeling to achieve minimum total system energy consumption.