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Abstract
In this paper, an on-chip photonic sampled and quantized analog-to-digital converter (ADC) on thin-film lithium niobate platform is experimentally demonstrated. Using two phase modulators as a sampler and a 5×5 multimode interference (MMI) coupler as a quantizer, a 1 GHz sinusoidal analog input signal was successfully converted to a digitized output with a 20 GSample/s sampling rate. To evaluate the system performance, the quantization curves together with the transfer function of the ADC were measured. The experimental effective number of bits (ENOB) was 3.17. The demonstrated device is capable of operating at a high frequency over 67 GHz, making it a promising solution for on-chip ultra-high speed analog-to-digital conversion.
© 2023 Optica Publishing Group under the terms of the Optica Open Access Publishing Agreement
1. Introduction
The analog-to-digital converter (ADC), which converts analog signals to digital signals, plays an important role in modern advanced information systems, such as radars, high speed communication systems, and precision measuring instruments. Nevertheless, conventional electronic ADCs are not suitable for ultra-high speed signal processing and large bandwidth applications due to serious aperture jitter and limited comparator bandwidth [1]. To overcome these bottlenecks, optical ADCs which utilize photonic components to implement the conversion were proposed and have become a hotspot in the field of optoelectronic technologies [2].
In recent years, many optical ADC schemes have been proposed and demonstrated, which can be divided into four major types [1]: photonic assisted (PA) ADC [3,4], photonic sampled (PS) ADC [2,5,6], photonic quantized (PQ) ADC [7] and photonic sampled and quantized (PSQ) ADC [8–18]. PA, PS and PQ ADCs still require several high speed electronic ADCs for either sampling or quantizing, resulting in additional power consumption and system complexity. The PSQ scheme, which performs sampling and quantization both in the optical domain, can avoid these problems and has attracted much attention in recent years [8–18]. PSQ ADC can be further subdivided into two broad categories by different quantization methods: optical amplitude quantization (OAQ) schemes [10–13] and phase-shifted optical quantization (PSOQ) schemes [8,9,14–18]. In OAQ schemes, different optical amplitude was distinguished via high optical nonlinearities . For example, Ref. [13] reported a 2 bit all optical ADC using photonic crystal based cavities. In [10], an optical ADC with a sampling rate of 40 GS/s and an effective number of bits (ENOB) of 3.79 was demonstrated by using a highly non-linear fiber to induce soliton self-frequency shift. However, OAQ schemes usually require high input optical power and a long interaction length, which lead to additional power consumption and difficulty of chip level integration. As for PSOQ schemes, the quantization is accomplished by the interference of light with different phases. The interference can be achieved by on-chip Mach-Zehnder interferometers, and the requirement of high optical nonlinearities in OAQ schemes is avoided. Thus, the optical power could be more efficient and the footprint could be relatively small. In Ref. [9], an optical ADC with sampling rate of 40 GS/s and ENOB of 3.45 using a phase shifter array was reported. In Ref. [14,15], an optical analog-to-digital conversion scheme using Mach–Zehnder modulators (MZM) with identical half-wave voltages was reported. Compared with the OAQ schemes, the above-mentioned PSOQ schemes effectively reduced the input optical power, but they still used discrete devices. In order to achieve an on-chip integration and further downsize the footprint of the system, a quantization approach using a 3$\times$5 step-size multimode interference (MMI) coupler was proposed [16]. The scheme in Ref. [16] was further investigated in Ref. [17]. A quantizer utilizing integrated photonics with ENOB of 3.31 was fabricated on SOI platform. However, the authors only focused on the quantizer, which is only one part of the PSQ ADC. The sampling process and the complete analog-to-digital conversion were not demonstrated. Furthermore, sampling a high speed analog signal for PSOQ schemes on SOI platform is challenging due to three main drawbacks. Firstly, the large half wave voltage ($V_\pi$) of high speed SOI phase modulators makes it difficult to meet the 2$\pi$ phase shift requirement in PSOQ schemes. The electrical drivers that can provide enough output power are hard to achieve, and a breakdown may occur when using reverse biased PN junction modulators. Next, the nonlinearities of the SOI modulators would lead to sampling errors. The modulation efficiency decreases when the input voltage increasing because of the nonlinearities of the plasma dispersion effect. Finally, the relatively small electro-optical (EO) 3-dB bandwidth of SOI modulators limits the sampling bandwidth of the ADC, which makes it difficult to be competent for ultra-fast applications.
To overcome these above-mentioned shortcomings, an on chip PSQ ADC on thin-film lithium niobate (TFLN) platform was demonstrated in this paper. The Pockels effect of lithium niobate provides linear modulation on TFLN. Over the past 4 years, many high speed and low $V_\pi$ electro-optical modulators on TFLN platform have been reported [19–21]. In [19], a EO 3-dB bandwidth of a 80 GHz and $V_\pi$ of 2.3 V modulator was demonstrated. It showed the capability of TFLN platform for large bandwidth sampling and meeting the 2$\pi$ phase shift requirement for the MMI quantizer with a lower drive voltage.
In our work, a PSQ ADC on a TFLN chip consisting of two beyond 67 GHz EO 3-dB bandwidth phase modulators and a 5$\times$5 MMI was demonstrated. The input analog signal was sampled by an optical pulse train using the two phase modulators. An optical 72$^{\circ }$ hybrid based on the 5$\times$5 MMI proposed in our previous study [22] was used for a 10-level quantization. The quantization results were then coded and converted to a digital output with 10 digitized levels. To evaluate the system performance, the quantization curves and the transfer function of our proposed ADC were measured and analyzed. A 1 GHz electrical analog sinusoidal signal was converted to a digital output with a 20 GS/s sampling rate. To the best of our knowledge, this is the first time that the sampling and the quantization were demonstrated on a single chip for PSQ ADCs. The ENOB was measured to be 3.17 and the input sampling EO 3-dB bandwidth was beyond 67 GHz. Therefore, our work has provided a potential solution towards high-bandwidth on-chip analog-to-digital conversions and optical signal processing systems.
2. Methods
A conceptual diagram of our proposed PSQ ADC is shown in Fig. 1. An analog signal is sampled by an optical pulse train using two identical 1-cm long phase modulators with opposite modulation phase shift. Next, the two sampled beams are quantized by a 5$\times$5 MMI. Following by a photodetector (PD) array and a digital signal processing (DSP) unit, the signal is then coded and transferred to digitized values. The following contents in this section will introduce the operation principles of sampling and quantization, which are the two main functions of our proposed ADC.
2.1 Sampling
As shown in Fig. 1, an optical pulse train is fed into the TFLN ADC chip as an optical source. The optical pulse train can be represented as
where $A, \omega, f(t)$ represent the amplitude, angular frequency and the normalized envelope of the pulse shape, respectively. To simplify the calculation, the initial phase of the optical pulse is considered to be zero. After the input analog signal is phase modulated, the amplitude of the two output beams ($E_0$, $E_1$) can be expressed as2.2 Quantization
The quantization process in our proposed ADC converts the two modulated beams with different phases into 5-channel outputs with 10 quantization levels. As shown in Fig. 2(a), after the analog signal is sampled, the two beams with a phase difference ($\Delta \phi$) are fed into a 15-um wide and 235-um long 5$\times$5 MMI. According to our previous study [22], when the input channels are the first and the third ports, the 5$\times$5 MMI can be used as an optical 72$^{\circ }$ hybrid with an acceptable phase deviation in a relatively large wavelength range. The output optical power intensities of the five channels of the MMI ($I_1 \sim I_5$) can be successively expressed as
Fig. 2. (a) Schematic diagram of the optical 72$^{\circ }$ hybrid. (b) Quantization curves of the quantizer. (c) The corresponding quantization codes for ten quantization levels.
Equation (6) shows that the optical power intensity of each channel is sinusoidally related to $\Delta \phi$. As one can see in Fig. 2(b), a 72$^{\circ }$ phase shift is induced between the adjacent quantization curves. Next, a threshold power is set at the middle of the normalized power to determine the digital output of each channel. For instance, if the output power intensity of one channel is above the threshold, it is decided to be 1. Otherwise is decided to be 0. The five transmission curves divide the threshold line into 10 regions, corresponding to 10 quantization levels. In Fig. 2(c), 10 groups of codes for the 10 quatization levels are shown. According to $log_210=3.32$, the above analysis indicates that the theoretically quantization bit of the 5$\times$5 MMI is 3.32. Noted that although 5 outputs channels are presented, the quantization resolution is 3.32 bits, not 5 bits. As shown in Fig. 2(c), the 10 output levels of the quantizer are represented by Grey code. The remaining 1.68-bit information or 22 quantization levels doesn’t exist. Any input voltage of the analog signal will not allow quantization outputs other than these 10 results to appear unless a quantization error occurs. Therefore, there is a redundancy of information in the 5 outputs. The XOR-operations approach described in Ref. [16] can be used to reduce the length of the code.
3. Device fabrication and experimental results
In this section, the fabrication process of the proposed optical ADC on the TFLN platform was illustrated. Then, the measurements of the quantization curves and the transfer function of the proposed ADC were introduced, and the equivalent ENOB was obtained. Finally, the experiment of digitizing a 1 GHz sinusoidal signal with a 20 GS/s optical pulse train was demonstrated.
3.1 Device fabrication
Figure 3(a) shows the microscope image of the demonstrated ADC, and Fig. 3(b) and (c) show the scanning electron microscope (SEM) image of the 5$\times$5 MMI and the grating coupler. The detailed fabrication process of the devices can be found in our previous work [23]. The devices were fabricated on a x-cut lithium niobate-on-insulator with a 400-nm thick TFLN and a 3-$\mu$m buried oxide. Firstly, the wafer was cleaned by a piranha solution (H$_2$SO$_4$/H$_2$O$_2$ = 3:1, 80$^{\circ }$C) and an oxygen plasma. Next, a microlithography adhesion promoter named Surpass 3000 and e-beam hydrogen silsesquioxane (HSQ) were sequentially spin-coated to the surface at 3000 rpm for 60s. After a 80$^{\circ }$C, 4 min pre-bake, the e-beam lithography was performed by the JBX-8100FS system with an accelerating voltage of 100 KV. Followed by the resist development, the TFLN was partially dry-etched by 200 nm using argon-based inductively coupled plasma reactive ion etching with approximately 1:2.5 etch selectivity between TFLN and HSQ. Finally, 1-$\mu$m thick gold electrodes were fabricated using UV lithography and a standard lift-off process. The total area of our demonstrated ADC is approximately 0.33$\times$11.8 mm$^2$.
Fig. 3. (a) Microscope image of the demonstrated ADC. SEM image of the fabricated 5$\times$5 MMI (b) and the grating coupler (c).
3.2 Measurement of quantization curves and transfer function
Figure 4 shows the experimental setup of the quantization curves and transfer function measurements. The ENOB can then be obtained from the experimental results. The input light was generated by a continuous wave (CW) laser and then connected to a polarization controller (PC). Next, it was fed into the ADC chip using a grating coupler and split into two paths by a 1$\times$2 MMI. After oppositely modulated by a 1 MHz triangular signal generated from an arbitrary waveform generator (AWG), the two modulated beams were connected to the input channels of the 5$\times$5 MMI. Therefore, the phase difference between the two beams ($\Delta \phi$) changed linearly over the half period of the triangular signal. After passing through the 5$\times$5 MMI, the output beams were amplified by an erbium-doped fiber amplifier (EDFA) to 3 dBm and then transferred to electrical signals by a PD with a responsivity of 0.7 A/W. The signals were recorded by an oscilloscope and processed into quantization curves by a linear time-phase mapping.
The normalized quantization curves of the 5 channels are shown in Fig. 5(a). The measured curves were 3 $\%$ smoothed to reduce the white noise induced by the PD. A decision threshold represented as the black dash line are set at the middle of the normalized power to determine the 10 quantization levels mentioned above. The dots are the intersections of the curves and the threshold, which represent the measured phases of the 10 quantization levels. The ideal phases of the 10 quantization levels are marked with triangles. Figure 5(b) shows the transfer function of our proposed ADC. The transfer function is obtained based on the quantization curves. The blue line is the measured value while the red line is the ideal one. Figure 5(c) shows the calculated results of the differential nonlinearity (DNL) and the integral nonlinearity (INL). The maximum DNL and INL are 0.39 least significant bit (LSB) and 0.10 LSB, respectively. The equivalent ENOB can be calculated using Eq. (6) according to Ref. [24].
Fig. 5. (a) Normalized quantization curves. (b) Transfer function and the ideal value. (c) DNL and INL.
The decrease between the theoretically quantization bit of 3.32 and the ENOB of 3.17 is induced by the phase errors mentioned above, which is mainly caused by the inherent phase deviation of a 5$\times$5 MMI, the fabrication errors and the PD noise. The asymmetric input channels lead to an inherent phase deviation of the 5$\times$5 MMI. A 5$\times$5 MMI with input ports of channel 2 and 4 can reduce the inherent phase deviation at a specific wavelength according to Ref. [22]. However, it would limit the operating wavelength range and lessen the fabrication tolerances. In order to lower the impact of the PD noise, larger output optical power is needed. One can design and manufacture MMI and phase modulators with lower insertion losses. Also, grating couplers can be replaced by edge couplers to reduce the coupling loss. To reduce the impact of fabrication errors, a compact MMI with sub-wavelength gratings [25] can be used to mitigate the effects of etching and substrate non-uniformity. Additionally, an optimized 5$\times$5 MMI design, such as using sub-wavelength structures in Ref. [26], can further decrease the phase errors, which is the research direction in our future works.
It is important to further improve the ENOB since a larger resolution would make the ADC suitable for a wider range of applications. Simply increasing the ports of the MMI to obtain a high quantization resolution is unwise, because the larger the MMI is, the more phase errors between the output ports would occur. The theoretical limit of the resolution depends on the phase errors. To achieve a resolution of 6 bits, the phase errors should be within $\pm$1.4$^{\circ }$ to ensure the DNL of the ADC within $\pm$0.5 LSB. The abovementioned MMI based on sub-wavelength structures may be able to meet the above requirements. Then one can either combine it with the multi-wavelengths method described in Ref. [27], or the multi-parallel-structure scheme with thermal phase shifters [28] to achieve a high quantization resolution.
3.3 Analog to digital conversion experiment
Using our presented optical ADC, a 1 GHz sinusoidal electrical analog signal was sampled and quantized. The experimental setup is shown in Fig. 6. Light generated from a CW was modulated by a commercial MZM. The amplitude of the input 20 GHz analog signal was 0.51 times of the $V_\pi$ of the commercial MZM, and the bias point induced by a DC source was $3/4V_\pi$. Thus, a 20 GS/s optical pulse train with a duty cycle of 37$\%$ was generated. After connected to a PC, the pulse train was fed into the ADC chip. A 1 GHz sinusoidal electrical analog signal was sampled by the pulse train and then quantized by the 5$\times$5 MMI. The 5 outputs were amplified by an EDFA to the maximum peak power of 3 dBm, and then filtered by a band pass filter (BPF). After fed into PDs, the output waveforms were recorded by an OSC.
The blue lines in Fig. 7(a) show the normalized recorded waveforms of the 5 output channels. The red dash lines are the ideal simulated envelopes of the pulses. The simulation results were based on Eq. (6), where the power was normalized and $\Delta \phi = (V_\pi /\pi )V_{pp}cos(\omega _mt)+\phi _1-\phi _2$. $V_\pi$ is the half wave voltage of the phase modulator. $V_{pp}$ and $\omega _m$ are the peak-to-peak voltage and angular frequency of input 1 GHz analog signal. $\phi _1-\phi _2$ is the initial phase difference mentioned above that can be adjusted by a DC source. The measured waveforms are generally consistent with the simulation results, and the mismatches are mainly due to the PD noise and the phase errors mentioned above. The black dash lines represent the threshold power. For each pulse in the waveforms, if the maximum power is larger than the threshold, the output value of this pulse is decided to be 1, and vice versa. Then, combining the output values of the 5 channels, the quantization codes are obtained. The corresponding digitized values overlaid with the input 1 GHz sinusoidal wave are shown as the circles and the solid line in Fig. 7(b). As a result, the analog-to-digital conversion of a 1 GHz sinusoidal wave was successfully implemented. Noted that only 7 of the 10 quantization levels are used in this proof-of-concept experiment, because the $V_{pp}$ of the input analog signal could only be amplified to 0.6 times of the $V_\pi$ of the phase modulators by the amplifier we used.
Fig. 7. (a) Normalized waveforms of the 5 output channels and ideal simulated envelopes. (b) Digitized values and the input 1 GHz sinusoidal wave.
In this experiment, we used a script on a computer to achieve the post-thresholding process. To accomplish a real-time signal process, a comparator behind each output channel is inevitable. An electrical comparator may still have difficulty working at high speed. Therefore, a photonic comparator can be considered for the real-time thresholding process for its merits as higher speed and lower power consumption. Several works about all-optical comparators utilizing optical nonlinearities have been reported [13,29]. The TFLN possesses both second- and third-order nonlinearities [30], and a photonic comparator on TFLN has the potential to overcome the high-speed real-time thresholding problem.
The output ports of the MMI were measured separately due to only one EDFA and one OSC available for the experiment. The RF Source 1 and RF Source 2 shown in Fig. 6 were synchronous to ensure that the 20 GHz and 1 GHz signals would not be misaligned over time. Therefore, the sampling positions of different cycles stayed the same, and the results obtained from each port represent the same sequence of digital values though measured separately. However, the influence of the sampling clock jitter on the result may not be well represented. The separate measurements may either mask the influence of jitters and the mismatch errors between the quantizer channels or further worsen the results because of randomly slight variations of sampling positions in different measurements. In order to accomplish a real-time measurement, which is our future goal, the output ports need to be simultaneously measured and processed. A fiber array connected to a PD array can be used to couple all the output light out and transfer them to electrical signals. To get rid of the use of multiple EDFAs, which consume a lot of power, edge couplers can be used to lower the optical loss. A field programmable gate array (FPGA) as the DSP unit can be used to process the data.
4. Discussion
The above experimental results show the ENOB of 3.17 and the capability of digitizing analog signals. To further evaluate the ADC performance, we measured the bandwidth of the sampling MZM. The characterizations of the small signal were performed using a 67 GHz vector network analyzer (VNA). A pair of GSG RF probes were used for applying signals from the VNA and connecting a 50 Ohm termination. Figure 8 shows the EO response as a function of frequency. The measured result decays about 2.6 dB from 10 MHz to 67 GHz. The simulated EO response was based on the average modulation voltage model described in [31], which considered the velocity mismatch, impedance mismatch, and microwave loss. The EO response can be expressed as
where $r(f_m)$ is the EO response of a frequency $f_m$, and $V_{avg}$ is the the average voltage experienced by a photon as it traverses through the modulator, which is given asAs shown in Fig. 8, the simulation result agrees with the measured result, and the EO 3-dB bandwidth is expected to be 73 GHz. This suggests that our presented ADC is capable of operating well with the input frequency up to 73 GHz. Due to the lack of a narrow optical pulse source, the digitized waveform was only 1 GHz in our experiment. As mentioned above, we used a single commercial MZM to generate a pulse train with a duty cycle of 37$\%$. The full width at half maximum (FWHM) of the pulse was 18.6 ps. The larger the pulse width, the wider the pulse was modulated in the time domain, and the resulting sampling error would also increase. Therefore, we oversampled the relatively low-frequency signal to reduce the error caused by the wide pulse and demonstrate the functionality of the proposed ADC. To further exploit the performance of the high-bandwidth sampling MZM, a pulse source with ultra-narrow pulse widths, such as a femtosecond mode-locked laser, or a time-lens system using cascaded phase modulator, MZM, and dispersion device [33,34], should be used to accurately sample high-speed analog signals.
A comparison of the bandwidth of the sampling MZM and the footprint for various types of optical ADCs is shown in Table 1. Compared to those reported optical ADCs, our proposed work has a relatively large bandwidth of the sampling MZM and is on-chip implemented with a compact footprint at the same time, which makes it a potential integrated solution for high-bandwidth analog-to-digital conversions in the field of all-optical signal processing.
Table 1. Comparison of reported optical ADCs
5. Conclusion
To draw a conclusion, we present an on-chip PSQ ADC on thin-film lithium niobate platform using two phase modulators for sampling and a $5\times 5$MMI for quantization. The quantization curves and the transfer function were measured and analyzed. The ENOB, obtained from the experimental results, was 3.17 bit. Using a 20 GS/s pulse train as an optical source, a 1 GHz input analog signal was converted to a digitized output. The footprint of the ADC is approximately 0.33$\times$11.8 mm$^2$. Furthermore, the demonstrated devices are capable of operating at a high frequency over 67 GHz. Therefore, the presented ADC provides a promising solution for ultra-high speed analog-to-digital conversions.
Funding
National Key Research and Development Program of China (2018YFE0201900).
Disclosures
The authors declare no conflicts of interest.
Data availability
Data underlying the results presented in this paper are not publicly available at this time but may be obtained from the authors upon reasonable request.
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