Abstract
We proposes an architecture of an optical parallel multiplier based on an optical analog addition. With optoelectronic circuit simulation, we show that the optical multiplier is more than three times faster than the CMOS multiplier.
© 2018 The Author(s)
PDF ArticleMore Like This
J. B. McManus and R. S. Putnam
ML5 OSA Annual Meeting (FIO) 1986
Huanfa Peng, Xiaofeng Peng, Yongchi Xu, Cheng Zhang, Yuanxiang Chen, Lixin Zhu, Weiwei Hu, and Zhangyuan Chen
JTu5A.79 CLEO: Applications and Technology (CLEO:A&T) 2016
Huanfa Peng, Rui Guo, Huayang Du, Yongchi Xu, Cheng Zhang, Jingbiao Chen, and Zhangyuan Chen
JW2A.67 CLEO: Applications and Technology (CLEO:A&T) 2018