1. Introduction

Microphotonic circuits built on the silicon-on-insulator (SOI) platform are very promising thanks to their complementary metal oxide semiconductor (CMOS) compatible fabrication processing. Moreover, their high refractive indices enable bending radii of SOI wires down to a few micrometers with negligible bending loss, leading to extremely compact optical circuits [1]. However, such high refractive indices also introduce high polarization dependences of the group index, the optical coupling and so on [2]. Such polarization dependences have been one of the major challenges for SOI microphotonic devices because the polarization state may change randomly over an optical fiber link, making SOI microphotonic devices incompatible with optical processing functionalities. It is possible to design polarization insensitive SOI ridge waveguides under certain requirements of the waveguide dimensions [3, 4]. However such requirements also limit the design of optical components and the optical confinement, hence the device footprint may be sacrificed as well. One of the most promising ways to solve the polarization sensitivity is based on polarization diversity (Pol-D) technology [5–8]. There are mainly two types of Pol-D circuits. One is based on a grating coupler, which works on a particular polarization and plays the role of a polarization splitter [5]. However, this scheme is limited by the insertion loss and bandwidth of the grating coupler. Another Pol-D scheme is based on polarization splitter and rotator (PSR) technologies [6–9]. In this scheme, the two orthogonal polarizations are first split by a polarization splitter [10]. After that, one of the two polarizations is rotated by 90° by a polarization rotator [11]. Thus, in the rest of the circuit, only one polarization needs to be processed. Previously, we have successfully demonstrated an efficient and compact PSR based on an asymmetrical directional coupler (DC) [12, 13], which parallel-couples a narrow and a wide silicon waveguide. Based on this structure, a Pol-D circuit has also been successfully demonstrated [8]. Compared to the other PSR schemes [5–7, 9, 11, 14, 15], this scheme only needs one step of exposure and etching, thus significantly simplifies the fabrication process. The main challenge of the DC-based PSR is the fabrication error sensitivity. Although the device is relatively insensitive to fabrication errors of the wide waveguide of the DC, the phase matching condition could still be easily destroyed by fabrication errors of the narrow waveguide [13]. Another similar PSR has been proposed relying on mode conversion from the TM₀ to the TE₁ mode by an adiabatic taper and then from TE₁ to TE₀ mode by an asymmetrical DC [16]. In this structure, the performance of the asymmetrical DC is still sensitive to fabrication variation.

In this paper, we propose and demonstrate a PSR based on a tapered DC, which parallel- couples a narrow silicon wire to another wide tapered waveguide. The tapered waveguide efficiently compensates the fabrication error of the narrow silicon wire, allowing the device to work well under relaxed fabrication errors. We theoretically analyze the fabrication tolerance of the device. Our experimental results show that the tolerance to the width of the narrow silicon wire is efficiently relaxed to more than 14 nm compared to only a few nanometers for a normal DC, while preserving a high power conversion coefficient over −1 dB. In addition, the sensitivity to the length of the DC is also efficiently relaxed.

2. Principle and simulation

The principle of the proposed PSR is schematically depicted in Fig. 1 . The PSR is based on a tapered DC, which parallel-couples a narrow silicon waveguide to a wide tapered waveguide with a coupling length of L. The width of the narrow waveguide is w₁. The wide waveguide is linearly tapered from w_a to w_b with center width of w₂ and taper length of L. The coupling gap between the two waveguides is g. When w_a = w_b = w₂, the structure is degenerated to a simple asymmetrical normal DC as reported previously [8, 12, 13]. In [8, 12, 13], the dimensions of the two waveguides are designed so that the effective refractive index of the fundamental transverse electric (TE₀, i.e. E_x dominant) mode of the narrow waveguide equals that of the fundamental transverse magnetic (TM₀, i.e. E_y dominant) mode of the wide waveguide. Satisfying this so-called phase matching condition results in a strong cross-polarization coupling between the two waveguides. In this case, if TE₀ light is injected into the narrow waveguide, it will be coupled to the TM₀ mode light in the wide waveguide and exit from the cross port. On the other hand, when TM₀ light is injected into the narrow waveguide, it will keep propagating along it and exit from the through port because of the significant effective refractive index difference between the two asymmetrical waveguides, resulting in very low coupling. To achieve an efficient cross-polarization coupling, both horizontal and vertical symmetries should be broken. To break the horizontal symmetry, a material which is different from the buffer layer (silicon oxide) should be applied as top-cladding layer [12]. In our design, air is employed as top cladding material. However, the phase matching can be easily destroyed by fabrication errors of the narrow waveguide. For instance, a 1 nm deviation of the width of the narrow waveguide requires a 15 nm adjustment of the width of the wide waveguide in order to maintain the phase matching [13]. Moreover, the length of the DC should also be properly designed, otherwise the converted TM₀ light will be coupled back to the narrow waveguide. In order to alleviate these limitations we introduce tapering of the wide waveguide. In this proposal, the cross-polarization coupling still relies on the phase matching between the two waveguides. However, the wide waveguide is tapered from w_2a to w_2b as shown in Fig. 1. Under a moderate width deviation of the narrow waveguide due to fabrication errors, the phase matching condition can still be fulfilled at a certain position thanks to the tapering of the wide waveguide. After the position along the taper where phase matching is satisfied, phase matching is not longer satisfied for the rest of the taper, thus the cross-polarization conversion efficiency is maintained and the fabrication error sensitivity of the coupling length is relaxed.

 

Fig. 1 Principle of the proposed polarization splitter and rotator based on a tapered DC. Light is launched from the narrow waveguide with a width w₁ and is coupled to a wide waveguide tapered from w_2a to w_2b with tapering length L.

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The device is designed on a SOI wafer with top silicon thickness of 250 nm. Figure 2 shows the effective indices of the TE₀, TE₁ and TM₀ modes of a single silicon waveguide as a function of waveguide width w calculated by a full vectorial mode matching method (FVMM) [17]. Considering widths of w_2a and w_2b for the wide waveguide, the corresponding widths of the narrow waveguide that result in the phase matching condition being satisfied are w_1a and w_1b, respectively. Consequently, a deviation of the narrow waveguide width between w_1a and w_1b will always allow for a position where phase matching is satisfied to be found along the length of the taper of the wide waveguide from w_2a to w_2b. If the taper length is designed to obtain an effective coupling length around the phase matching position, high cross-polarization conversion efficiency will be realized. After the phase matching position, the conversion efficiency will be maintained since phase matching is not satisfied for the rest of the taper. Numerical simulations performed using the three dimensional finite difference time domain (3-D FDTD) technique [18] confirm this behavior (Figs. 3(a) and 3(c)). Two points need to be considered further. First, w_2b should be smaller than the width w' where the TM₀ and TE₁ modes are coupled [16], as shown in Figs. 3(b) and 3(d). Second, w_2a should not be too close to w_1b to avoid TE₀ light coupling between the two waveguides.

 

Fig. 2 Effective indices of the TE₀, TE₁ and TM₀ modes of an air-clad SOI waveguide as a function of the waveguide width w for a waveguide height h = 250 nm.

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Fig. 3 3-D FDTD simulations of the tapered DC for TE₀ light injected into the narrow waveguide. (a) and (c) w₁ = 340 nm, w_2a = 500 nm, w_2b = 660 nm, L = 80 μm. (b) and (d) w₁ = 340 nm, w_2a = 500 nm, w_2b = 800 nm, L = 80 μm. The resolution of the 3-D FDTD space grid is ∆x = 20 nm, ∆y = 50 nm, ∆z = 50 nm.

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In the 3-D FDTD simulations of Fig. 3, the grid size in the x direction is 20 nm, which is too large to precisely analyze the fabrication error sensitivity. Decreasing the grid size further will however dramatically increase the computation time. In order to accurately analyze the fabrication error sensitivity of the tapered DC, the eigenmode expansion (EME) method [19] is employed. We choose w₁ = 329 nm, w₂ = 550 nm and g = 100 nm as a starting point since these widths satisfy the phase matching condition [12]. Considering that the phase matching is much more sensitive to the width of the narrow waveguide than to that of the wide waveguide of the DC [13], only the sensitivity to the width deviation of the narrow waveguide is investigated. Since the TM₀ and TE₁ modes are coupled when w' = 700nm for a single silicon waveguide, as shown in Fig. 2, we choose a tapering from w_2a = 450 nm to w_2b = 650 nm with center width of 550 nm for the wide waveguide, so that w_2b<w' and w_2a>w_1b = 341 nm, as mentioned before. The width of the narrow waveguide is changed to w₁ ± ∆w for fabrication sensitivity investigation, where ∆w is the width deviation due to fabrication error. Figure 4(a) shows the power conversion coefficient _{$T_c^{T{E}_0-T{M}_0}$} (from the TE₀ mode at the narrow waveguide input to the TM₀ mode at the cross port) as a function of the coupling length L for both tapered and normal (straight) DCs. Two coupling gaps of 100 nm and 150 nm are considered for the tapered DC. The operation wavelength is 1550 nm. One can find that, for a tapered DC, _{$T_c^{T{E}_0-T{M}_0}$} increases as L increases. This is because as L increases, the effective coupling length around the phase matching position increases, resulting in a higher conversion coefficient. Further increasing L leads to some small fluctuations at high conversion coefficient levels because of the little residual cross-polarization coupling after the phase matching position. One can also find that, for a larger coupling gap, a longer tapering length is needed to obtain a high conversion coefficient. Compared to the tapered DC, _{$T_c^{T{E}_0-T{M}_0}$} exhibits a periodic dependence on the coupling length for a normal DC. After _{$T_c^{T{E}_0-T{M}_0}$} reaches its maximum, further increasing L will lead to its decrease to less than −20 dB. Detailed investigations of _{$T_c^{T{E}_0-T{M}_0}$} as a function of the width deviation ∆w for different L and g are performed for both tapered and normal DCs, as shown in Fig. 4(b). One can find that, in case of a tapered DC with coupling gap of 100 nm, a high _{$T_c^{T{E}_0-T{M}_0}$} is still obtained within a width deviation range of about 15 nm for L varying from 100 μm to 160 μm. Since a high _{$T_c^{T{E}_0-T{M}_0}$} is maintained as L further increases, such width deviation tolerance is also expected for L longer than 160 μm. A similar width deviation tolerance is also obtained when g = 150 nm for L larger than 200 μm. Consequently, when L>200 μm, large fabrication tolerances for both width w₁ and coupling gap g are expected. However, in case of a normal DC, only a few nanometers of width deviation will lead to a dramatic decrease of _{$T_c^{T{E}_0-T{M}_0}$}. Moreover, _{$T_c^{T{E}_0-T{M}_0}$} and the width deviation tolerance are much more sensitive to L.

 

Fig. 4 Simulated power conversion coefficient _{$T_c^{T{E}_0-T{M}_0}$} as a function of coupling length L for different width deviations ∆w and coupling gap g (a), and as a function of width deviation ∆w for different L and g (b) for both tapered and normal DCs. The operation wavelength is 1550 nm.

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3. Fabrication and experimental results

In order to demonstrate our concept, a tapered DC was fabricated on a SOI wafer with top silicon thickness of 250 nm and buried silicon dioxide of 3 μm. First, diluted (1:1 in anisole) electron-beam resist ZEP520A was spin-coated on the wafer to form a ~110 nm-thick mask layer. The device was then defined using electron-beam lithography (JEOL JBX-9300FS). The sample was etched afterward by inductively coupled plasma reactive ion etching (ICP-RIE) to transfer the patterns to the top silicon layer. Figure 5 shows pictures of the fabricated device. The wide waveguide is tapered from 406 nm to 606 nm. The coupling gap is 100 nm. Samples with different narrow waveguide widths w₁ in the range 310-329 nm are fabricated in order to investigate the fabrication error tolerance. Details on the measurement setup and calibration procedure can be found in [12].

 

Fig. 5 Microscope picture of the fabricated tapered DC and scanning electron microscope (SEM) images of the starting and ending coupling areas of the tapered DC.

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Figure 6(a) shows the measured power conversion coefficient _{$T_c^{T{E}_0-T{M}_0}$} for different dimensions of the narrow waveguide. Similar transmissions are obtained around 1550 nm for different narrow waveguide widths w₁. The fabrication tolerance can be more easily assessed in Fig. 6(b), where the conversion coefficient is plotted as a function of the narrow waveguide width. It can be seen that a deviation tolerance of 14 nm (from 310 nm to 324 nm) is obtained for w₁ to maintain a high _{$T_c^{T{E}_0-T{M}_0}$} over −1 dB. Note that since _{$T_c^{T{E}_0-T{M}_0}$} was not investigated for w₁ smaller than 310 nm, the actual width deviation tolerance of the narrow waveguide should be larger than 14 nm. Such relaxed tolerance could allow the device to be fabricated by deep ultraviolet lithography (DUV) based fabrication technologies [20], thus supporting mass production. A further increase of w₁ over 324 nm results in a decrease of _{$T_c^{T{E}_0-T{M}_0}$}. The coupling length sensitivity is also investigated for w₁ = 324 nm, as shown in Fig. 6(c). Similar _{$T_c^{T{E}_0-T{M}_0}$} conversion coefficients are obtained for tapering lengths varying from 100 μm to 140 μm, indicating a good tolerance of the fabricated device to the taper length.

 

Fig. 6 (a) Measured power conversion coefficient _{$T_c^{T{E}_0-T{M}_0}$} for different w₁ with coupling length L = 140 μm. (b) Measured _{$T_c^{T{E}_0-T{M}_0}$} at the peak wavelength of 1540 nm as a function of w₁ for L = 140 μm. (c) Measured _{$T_c^{T{E}_0-T{M}_0}$} for different tapering lengths L for w₁ = 324 nm.

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4. Conclusion

We have proposed and demonstrated a novel PSR based on a tapered DC, which simply consists of a narrow silicon wire parallel-coupled to a wider tapered waveguide. The device can be easily fabricated in a single step of exposure and etching. Numerical and experimental results show that the tolerance of the narrow waveguide width is relaxed to more than 14 nm for the proposed PSR compared to only few nanometers for previously reported PSRs based on normal DC. The PSR is also demonstrated to be less sensitive to the length of the DC.