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Abstract
We propose an infrared-sensitive negative differential transconductance (NDT) phototransistor based on a graphene/WS2/Au double junction with a SiO2/Ge gate. By changing the drain bias, diverse field-effect characteristics can be achieved. Typical p-type and n-type behavior is obtained under negative and positive drain bias, respectively. And NDT behavior is observed in the transfer curves under positive drain bias. It is believed to originate from competition between the top and bottom channel currents in stepped layers of WS2 at different gate voltages. Moreover, this phototransistor shows a gate-modulated rectification ratio of 0.03 to 88.3. In optoelectronic experiments, the phototransistor exhibits a responsivity of 2.76 A/W under visible light at 532 nm. By contrast, an interesting negative responsivity of −29.5 µA/W is obtained and the NDT vanishes under illumination by infrared light at 1550 nm. A complementary inverter based on two proposed devices of the same structure is constructed. The maximum voltage gain of the complementary inverter reaches 0.79 at a supply voltage of 1.5 V. These results demonstrate a new method of realizing next-generation two- and three-dimensional electronic and optoelectronic multifunctional devices.
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1. Introduction
In recent decades, the critical size of transistors has decreased continuously, in accordance with Moore’s law. However, as transistors become even smaller, they approach the limits of Moore's law. Various functional devices and advanced technologies, such as gate-all-around field effect transistors, [1–5] Si-based optical interconnections, [6–10] and multi-valued logic (MVL) computing, [11–15] have been proposed and demonstrated for maintaining miniaturization according to Moore's law. To realize integrated logic circuits based on these technologies, high-performance functional devices and fundamental logic units, for example, inverters and NAND gates, are urgently needed.
Two-dimensional (2D) semiconductor materials such as graphene (Gr), [16,17] molybdenum disulfide (MoS2), [18–21] tungsten disulfide (WS2), [22–25] and tungsten diselenide (WSe2) [26–28] provide a sustainable platform for realizing high-performance functional devices because of their unique structures and exceptional properties [29,30], including ultrathin atomic layers, tunable band structures, the absence of dangling bonds, and high light absorbance [31–33]. Recently, WS2 have been intensively studied as photodetectors, due to its chemical and thermal stability, tunable band gap ranging from visible to UV, large crystal size, and possibility of forming uniform films using chemical vapor deposition (CVD). Moreover, various functional logic units have been reported, [34–36] such as WSe2-transistor-based complementary inverters [34] and MoS2-transistor-based NAND gates [37]. In addition, devices based on 2D materials have been used to realize logic functions in MVL circuits [38–42]. Negative differential transconductance (NDT) devices based on MoS2/MoTe2 heterojunctions [43] and stepped gate dielectrics [44] were recently demonstrated. However, there are few reports on the effects of light on the characteristics of these logic circuits and the feasibility of light-controlled logic units. Furthermore, it is highly important to obtain 2D materials that are compatible with conventional semiconductors such as silicon and Ge.
In this work, a Ge-gated NDT phototransistor based on a Gr/WS2/Au double junction is proposed. NDT is obtained by modulating the current in the top and bottom channels of a stepped WS2 layer at different gate biases. In addition, a gate-modulated rectification ratio and drain bias polarity-related diverse charge transport behavior (p-type FET behavior is observed at negative drain bias and n-type FET behavior is observed at positive drain bias) are obtained by tuning the energy band structure of the Gr/WS2/Au double junction. Furthermore, under illumination at 532 nm, this Ge-gated Gr/WS2/Au phototransistor exhibits a high responsivity of 2.76 A/W and retains its NDT. However, under illumination by 1550 nm light, the NDT vanishes, and an interesting negative responsivity of −29.5 µA/W is observed. A complementary inverter based on the proposed device are constructed to illustrate its potential for future electronics applications. These results are valuable for the further development of functional devices and their applications to novel functional integrated circuits.
2. Results and discussions
Figure 1(a) and 1(b) show a schematic diagram and an optical microscopy image of the Gr/WS2/Au phototransistor, respectively. Two flakes of WS2 were transferred to a patterned Ge/SiO2 substrate to form a stepped layer structure; multilayer Gr was then transferred onto the structure, where it was in contact with both the top and bottom WS2 layers simultaneously. Details of device fabrication and characterization can be found in the Experimental details section of Supplement 1 (SI). Atomic force microscopy (AFM) measurement revealed that the thicknesses of the top and bottom WS2 layers are 29.8 and 53.2 nm, respectively, as shown in Fig. 1(c). An AFM morphology image is shown in Figure S1 in Supplement 1. Figure 1(d) shows the Raman spectra of WS2 flakes from the heterojunction region. And the Raman spectra of the top and bottom WS2 flake are shown in Figure S2 in Supplement 1. In these Raman spectra, three main peaks at approximately 349, 356, and 420 cm−1 correspond to the 2LA (second-order longitudinal acoustic), E2g1 (in-plane vibration), and A1g (out-of-plane) modes of WS2, respectively. These results suggest that WS2 flakes were successfully transferred to the patterned Ge/SiO2 substrate.
Fig. 1. a) Schematic illustration and b) optical microscopy image of Gr/WS2/Au double junction phototransistor. The top WS2, bottom (Bot) WS2, and Gr layers are indicated by blue, yellow, and orange dashed lines, respectively. c) Measured thicknesses of top and bottom WS2 layers from AFM results. d) Raman spectra of WS2 flake.
Figure 2(a) shows a dark drain current (Id) contour map [gate voltage (Vg) versus the drain bias (Vd)] of the Gr/WS2/Au phototransistor. During the test, the drain electrode is connected to the top WS2 flake. Vg and Vd are in the range of ±10 and ±1 V, respectively. The three output curves (Id–Vd) of the device at Vg = −10, 0, and 10 V are displayed in Figure S3 in Supplement 1. Interestingly, the drain current (Id) under negative bias (Vd < 0) is higher than that under positive bias (Vd > 0) when Vg = −10 V; however, Id is lower under negative bias than under positive bias when Vg = 10 V. That is, the gate bias can effectively control the rectification direction of the Gr/WS2/Au heterojunction. To intuitively illustrate this modulation effect, the rectification ratio of the Gr/WS2/Au heterojunction is calculated as Id_Vd = 1 V/Id_Vd = −1 V; the result is shown in Fig. 2(b). For Vg = −10 V, the rectification ratio is approximately 0.03, and it increases with Vg. The rectification ratio becomes larger than 1 when Vg exceeds 3.9 V, and the largest value, 88.3, is obtained at Vg = 10 V. This clearly gate-modulated rectification behavior is ascribed to the fact that the Gr/WS2 or WS2/Au heterojunction dominates the current of the device at Vg = −10 or 10 V, respectively.
Fig. 2. a) Dark Id contour map (Vg versus Vd) of the phototransistor. The inset shows the device schematic with proper biasing condition when measuring output curves. b) Rectification ratio at gate bias of ±10 V. In the orange and pink areas, the rectification ratio is smaller and larger than 1, respectively. Transfer curves of the device under bias of c) Vd = −1 V and d) Vd = 1 V. The inset in c) shows the device schematic with proper biasing condition when measuring transfer curves. NDT is indicated by the dashed line.
Moreover, as shown in Fig. 2(c) and 2(d), an interesting diverse charge transport behavior with regards to the polarity of the drain bias (p-type FET behavior is observed at negative drain bias and n-type FET behavior is observed at positive drain bias) is observed in the transfer curves of the Gr/WS2/Au phototransistor. These transfer curves on logarithmic scale are shown in Figure S4 in Supplement 1. At negative drain bias (Vd < 0), a negative gate voltage (Vg < 0) turns the transistor on, confirming p-type behavior. By contrast, a positive gate voltage (Vg > 0) turns the transistor on under positive drain bias (Vd > 0), indicating n-type behavior. Note also that NDT appears in the transfer curve during the forward sweep (from −10 to 10 V) under positive drain bias. However, NDT is not observed in the reference device without the stepped WS2 layer, as shown in Figure S5 in Supplement 1, indicating that NDT originates from this stepped WS2 layer structure. The low ON current in the phototransistor as compared to the reference device is attributed to the van der Waals gap between top and bottom WS2 flakes. Moreover, this NDT bahavior is relevant to the thickness of the bottom WS2 layer. As shown in Figure S6 in Supplement 1, as the thickness of bottom WS2 layer decreases, a smaller NDT behavior is observed.
In addition, hysteresis loops are observed in the Id–Vg curves under both negative and positive drain bias within different voltage ranges. This clear hysteresis originates from trapping and de-trapping of carriers at the WS2/SiO2 interface owing to the gate effect [45,46]. Therefore, a large threshold voltage hysteresis (ΔVth) is observed.
To clarify the origin of the diverse charge transport behavior of the Gr/WS2/Au double junction phototransistor, a physical model based on energy band theory was developed. Kelvin probe force microscopy (KPFM) was used to quantitatively determine the work function of multilayer WS2, and the results are shown in Fig. 3(a). (KPFM image of WS2 and Gr flakes and the calculation of the work function of WS2 are shown in Figure S7 in Supplement 1). According to Fig. 3(a), the contact potential difference (ΔVCPD) between Gr and WS2 is approximately 0.056 eV. Thus, the work function of WS2 is calculated to be 4.544 eV. Figure 3(b) shows the energy band alignment of the Gr/WS2/Au phototransistor under equilibrium based on these results. The conduction band barriers at the Gr/WS2 (φGr/WS2) and WS2/Au (φWS2/Au) interfaces are 0.056 and 0.556 eV, respectively. The Gr/Au contact is an ohmic contact, and the WS2/Au contact is a Schottky contact. Thus, asymmetrical Schottky diodes are formed in the Gr/WS2/Au heterojunction structure. When Vd = −1 V (Fig. 3(c)), the electron transport from Au to WS2 is negligible because of the high barrier at the Au/WS2 junction; thus, holes dominate, resulting in p-type behavior. By contrast, electrons dominate when Vd = 1 V (Fig. 3(d)) because of the low barrier at the Gr/WS2 junction; therefore, n-type behavior is obtained.
Fig. 3. a) Contact potential difference between WS2 and Gr flakes. b) Schematic band alignment of Gr/WS2/Au heterojunction. Energy band of Gr/WS2/Au heterojunction at c) Vd < 0 V and Vg < 0 V; d) Vd > 0 V and Vg > 0 V.
The optoelectronic properties of the phototransistor were characterized under illumination at 532 and 1550 nm, as illustrated in the schematic drawing in Fig. 4(a). The effects of visible and near-infrared light on the transfer curve of the phototransistor were also investigated, and the results are shown in Fig. 4(b) and 4(c), respectively. As shown in Fig. 4(b) (Vd = −1 V), under illumination at 532 and 1550 nm, large and vary small increases in drain current, respectively, appear. As shown in Fig. 4(c) (Vd = 1 V), the drain current also increases significantly under 532 nm illumination. The responsivity (R) is defined as Iph/Pin, where Iph is the photocurrent of the device, and Pin is the intensity of the light; the maximum responsivity of 2.76 A/W is obtained at Vd = 1 V and Vg = 4 V. This photoresponsivity originates from the photoconductive effect, due to photocurrent is gradually raising with an increase reverse Vd under the fixed incident laser power (Figure S8 of Supplement 1). In photoconductive gain mechanism, minority carriers are trapped so that majority carriers can recirculate along the channel for each absorbed photon. However, the drain current decreases significantly, from 3.66 to 1.27 nA, under 1550 nm illumination at Vg = 5 V, which corresponds to a negative responsivity of −29.5 µA/W. More importantly, the NDT vanishes under 1550 nm illumination, whereas it still appears under 532 nm illumination, as shown in Fig. 4(d).
Fig. 4. a) Schematic diagram of measurement setup for optoelectronic characterization. Transfer curves of phototransistor under 532 and 1550 nm illumination at drain bias of b) 1 V and c) −1 V. d) gm–Vg curves of phototransistor in the dark and under 532 and 1550 nm illumination during forward sweep (from −10 to 10 V). The NDT region is shown in pink. Schematic cross sections of the device e) in the dark and f) under 1550 nm illumination. The dark and light purple arrows in e) and f) mark the major and minor current channels, respectively.
Tunneling between two different materials is a commonly source of NDT behavior in previous report [43]. Whereas, in our device, the two conducting channels are both WS2, therefore, the tunneling effect between these two WS2 channel can not lead to NDT behavior. Considering the stepped WS2 layer, the large band gap of WS2, and the high absorption coefficient of Ge at 1550 nm, the NDT and the novel wavelength-sensitive ambipolar photoresponse are probably related to carrier accumulation at the SiO2/Ge interface. In the dark, only a small portion of the holes accumulate at the Ge surface at low gate voltage, due to the change of accumulated carrier number always lags behind the change of gate voltage; therefore, the channel current flows mainly in the top WS2 layer, as shown in Fig. 4(e). As Vg increases, the number of holes that accumulate at the Ge surface increases; thus, electrons tend to flow in the bottom WS2 layer rather than the top WS2 layer under the electrostatic effect, and scattering at the WS2/SiO2 interface decreases the drain current. Consequently, NDT appears. On the contrary, positive photoresponse is observed in the time-resolved responses under 532 and 1550 nm (Figure S9 of Supplement 1). This positive photoresponse is attributed to the additional carriers (photogenerated carriers) accumulation at the Ge/SiO2 interface under a fixed gate voltage. These additional carriers increase the conductivity in the WS2 channel, and therefore postivie photoresponse is observed. During transfer curves measurement under 1550 nm illumination, owing to band bending in Ge, a large number of photogenerated holes accumulate at the SiO2/Ge interface (Fig. 4(e) and the band bending in Ge is shown in Figure S10 in Supplement 1) at both high and low Vg. Therefore, current in the transistor always flows in the bottom WS2 layer where the scattering effect is more obvious. As a result, negative responsivity under 1550 nm illumination is obtained and NDT does not appear. Under 532 and 1550 nm illumination, the photoresponse originated from the channel and Ge gate of the phototransistor, respectively. Therefore, the trap/release process at WS2/SiO2 interface and Ge/SiO2 interface are the main factor limiting the dynamic response at 532 and 1550 nm, respectively.
We demonstrate an application of the diverse charge transport behavior of the proposed device in a complementary inverter. As shown in Fig. 5(a), the inverter is based on two Gr/WS2/Au phototransistors under negative and positive drain bias, respectively. Figure 5(b) shows the circuit diagram of the complementary inverter. Figure 5(c), 5(d), and 5e show the typical electrical characteristics of the inverter in the dark, under 532 nm illumination, and under 1550 nm illumination, respectively. In the dark, the difference in output voltage (ΔVout) between the high (state 1) and low (state 0) states is 1.35 V at a supply voltage (Vdd) of 1.5 V. A maximum voltage gain of 0.79 is obtained at the same Vdd. The large subthreshold swing limits maximum voltage gain of this inverter. Under 532 nm illumination, ΔVout decreases from 1.35 to 0.95 V, and therefore the maximum gain decreases to 0.62. By contrast, 1550 nm illumination has little effect on the electrical characteristics of the inverter. ΔVout and the voltage gain remain 1.35 and 0.79, respectively, under 1550 nm illumination. This decrease in the difference between the 1 and 0 states under 532 nm illumination may be related to the dramatic decrease in the OFF-state resistance of the device. It is well known that Vout can reach 0 V (Vdd) only if the OFF-state resistance of a p-type (an n-type) transistor in an inverter is sufficiently large. In our device, the OFF-state current at Vd = −1 V and Vg = 7.5 V increased from ∼10−12 to ∼10−9 A under 532 nm illumination. Thus, the device cannot be completely turned off, and Vout is lower in the high state and higher in the low state. However, the OFF-state current is only ∼10−11 A under 1550 nm illumination; thus, the electrical characteristics remain the same as those in the dark.
Fig. 5. a) Schematic representation and b) circuit diagram of complementary inverter based on two Gr/WS2/Au phototransistors under negative and positive bias. Voltage transfer curve of the inverter c) in the dark, d) under 532 nm illumination, and e) under 1550 nm illumination at Vdd = 1.5 V. Insets show corresponding voltage gain.
3. Conclusion
We reported an infrared-sensitive NDT phototransistor based on Gr/WS2/Au double junction with stepped WS2 structure. The rectification ratio of the device can be tuned from 0.03 to 88.3 in a gate bias range of ±10 V, and interesting diverse transport behavior was observed. In addition, NDT was observed in the transfer curves of the device; it is attributed to the dominance of the current in the top or bottom WS2 layer depending on the gate voltage. Optoelectronic experiments revealed that the device exhibited a large responsivity of 2.76 A/W and a negative responsivity of −29.5 µA/W under illumination at 532 and 1550 nm, respectively. Importantly, the NDT disappeared under 1550 nm illumination, which can be ascribed to hole accumulation at the Ge surface. The potential application of this Ge-gated Gr/WS2/Au phototransistor in a complementary inverter was demonstrated. These results support the development of 2D-material-based multifunctional transistors for photodetection, logic computing, and functional circuits.
Funding
Natural Science Basic Research Program of Shaanxi (2022JQ-650); National Key Research and Development Program of China (2019YFB2204400).
Disclosures
The authors declare no conflicts of interest.
Data availability
Data underlying the results presented in this paper are not publicly available at this time but may be obtained from the authors upon reasonable request.
Supplemental document
See Supplement 1 for supporting content.
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