Abstract
A germanium-on-insulator (GOI) p-i-n photodetector, monolithically integrated on a silicon (Si) substrate, is demonstrated. GOI is formed by lateral-overgrowth (LAT-OVG) of Ge on silicon dioxide (SiO2) through windows etched in SiO2 on Si. The photodetector shows excellent diode characteristics with high on/off ratio (6 × 104), low dark current, and flat reverse current-voltage (I-V) characteristics. Enhanced light absorption up to 1550 nm is observed due to the residual biaxial tensile strain induced during the epitaxial growth of Ge caused by cooling after the deposition. This truly Si-compatible Ge photodetector using monolithic integration enables new opportunities for high-performance GOI based photonic devices on Si platform.
© 2015 Optical Society of America
1. Introduction
Optical communication is already being widely used for long range telecommunication. With further CMOS scaling and increasing demands on higher bandwidth data communication, shorter range chip-to-chip and on-chip optical interconnects are under active study [1].
Silicon (Si) is by far the most prevalent semiconductor material in the CMOS industry. Unfortunately, because of its indirect band structure and large optical bandgap, Si cannot be used for C-band optical communications at 1550 nm. III-V compound semiconductors are inherently suitable for optical devices due to their small and direct bandgap properties. However, the overall process cost is too high and the integration of III-V materials with Si is rather complicated and expensive due to the inter-diffusion, surface polarity, and generally large lattice constant mismatch. On the other hand, germanium (Ge), a group IV material, is an attractive alternative for light detection at the C-band if it can be integrated on Si monolithically [2,3]. Although Ge is also an indirect bandgap material, its direct gap energy of 0.8 eV which corresponds to 1500 nm can be further reduced by tensile strain, and therefore, the absorption edge can be pushed further to cover most of the C-band [4,5].
Because of these advantages of Ge, research on Ge-based photonic devices on a Si platform has been attracting much attention. Metal-semiconductor-metal (MSM) and p-i-n photodetectors have been demonstrated on epitaxially grown Ge on Si [4–6]. However, when used for shorter wavelength telecommunication systems at 850 nm, they have severe bandwidth limitation caused by Si absorption. To overcome this bandwidth problem and to provide better charge carrier confinement, Ge-on-insulator (GOI)-based photodetectors have been proposed. To employ the GOI-based optical devices with Si based CMOS circuitry, a technique to monolithically integrate a GOI platform on a Si substrate is required. Different approaches for GOI-based photodetectors have been studied over the last few years [7,8]. Of various approaches, wafer-bonded GOI provides very high material quality, and high performance devices base on this approach have been reported [9], but this approach does not allow monolithic integration. Hetero-epitaxial growth of Ge on ultrathin Si-on-insulator (SOI) has also been studied. Ge-on-SOI approach provides a convenient way of integrating Ge photodiodes with Si waveguides, and photodiodes have been demonstrated based on this approach [7–12]. However, this approach has some limitations. First of all, the process needs to start from an expensive SOI substrate. Second, it cannot be integrated with a bulk Si wafer. Furthermore, since the active Ge layer sits right above the defective Si/Ge interface, the device layer suffers from high density of threading dislocations (~1 × 108 /cm2 on 400 nm thick GOI [8,13]). When integrated on a Si waveguide, the defective Si/Ge interface is likely to degrade the device responsivity. Also, Si up-diffusion into the Ge layer degrades infrared absorption [8]. Recently, researchers also investigated a technique to selectively grow Ge on Si only through small growth windows and demonstrated improved crystal quality due to aspect ratio trapping (ART). However, this also cannot provide carrier confinement. Ge image sensors based on selective growth technique for better crystal quality have been studied [14,15]. By using this approach, high quality Ge could be grown by ART [16,17], the growth window is sitting right beneath the active Ge island, and the carriers are not confined within the GOI region.
In this work, we proposed and experimentally demonstrated Ge-based photodetectors on oxide which is realized by lateral-overgrowth (LAT-OVG) process [18–20]. The quality of the LAT-OVG GOI platform is compared to the more conventional approach, Ge grown on thin SOI. LAT-OVG GOI shows very high crystal quality and higher level of residual strain, which is suitable for optical applications. Based on this approach, we demonstrate a high performance GOI photodetector monolithically integrated on Si. Resulting photodetector shows very high on/off ratio, low dark current, and optical absorption over the entire C-band.
2. Process flow
The process flow and the device structure are shown in Fig. 1. On (001) Si substrate, 950 nm SiO2 is thermally grown at 1000 °C by wet oxidation. 500 nm growth windows separated by 5 μm are defined by a dry etching, and finished with a wet etching (Fig. 1. (a)). Ge LAT-OVG is done to create the GOI platform (Fig. 1(b)). Germane (GeH4) gas is used for Ge growth. 300 nm thick Ge seed layer is grown at 400 °C, followed by 825 °C hydrogen annealing. Then, Ge is grown selectively through the growth window at 600 °C. For better growth selectivity and minimal polycrystalline nucleation on SiO2 surface, HCl gas is flown along with GeH4 [20]. When the growth window is filled, lateral overgrowth is done at 500 °C for void-free GOI [20]. Chemical-mechanical polishing (CMP) and wet etching are used to planarize the Ge surface and reduce the thickness of the GOI to 500 nm (Fig. 1(c)). GOI active area is defined and isolated from the growth window by dry etching. On this 5 μm wide active GOI region, lateral p-i-n photodetectors are made (Fig. 1(d)).
4 μm wide and 2 μm long n- and p-type regions, separated by 1 μm i-regions, are formed by ion implantation. Each photodetector has three n-type fingers and two p-type fingers (Fig. 1(e)). 20 nm atomic layer deposition (ALD) aluminum oxide (Al2O3) followed by 20 nm low temperature CVD oxide (LTO) is used for surface passivation. A 20 nm titanium (Ti) / 180 nm aluminum (Al) metal stack is used for contact fingers and contact pads. For n-type doping, 1014 /cm2 phosphorus is implanted at 50 keV, and for p-type doping, 1014 /cm2 boron at 20 keV. After the implantation, the dopants are activated by 500 °C rapid thermal annealing (RTA) in a nitrogen ambient. No anti reflection coating (ARC) is used, and no additional forming gas anneal (FGA) is done (Fig. 2).
3. Results and discussion
To evaluate the quality of the GOI platform, 500 nm GOI prepared by lateral overgrowth is compared to the more conventional approach: 500 nm Ge directly grown on 20 nm SOI with 400 nm buried oxide. TDD is measured and compared by atomic force microscopy (AFM). Due to the ART and the defect necking, lateral overgrowth provides lower TDD of 1~3 × 106 /cm2, while TDD in Ge on SOI is 0.5~1 × 108 /cm2. Germanium epitaxy employs several high temperature annealing steps for better crystal quality. Unlike Ge grown on uniform SOI, in LAT-OVG GOI, like in a partial SOI structure [21], non-uniform stress distribution around the oxide is expected. Raman spectroscopy is used to measure the residual strain in GOI (Table 1). Compared to Ge on SOI, higher strain is observed from LAT-OVG GOI. Stress modeling using COMSOL Multiphysics® software package also predicts higher stress in the LAT-OVG GOI (Fig. 3).
As a result of the lower TDD and the higher residual strain, compared to Ge on SOI, LAT-OVG GOI shows higher photoluminescence (PL) (Fig. 4). Higher residual strain in LAT-OVG GOI (Table 1) shifts PL peak position towards longer wavelength.
With better crystal quality, separation of the defective Si/Ge interface from the GOI device region, and higher strain, the LAT-OVG GOI is expected to provide a better platform for optical applications than the conventional SOI based approach. By replacing the SiO2 growth masks with SiO2 covered polycrystalline- or amorphous-Si waveguides, integration of GOI based optics and Si waveguides can also be achieved.
I-V characteristics and the optical response of the resulting photodetector are shown in Fig. 5. Without FGA, the photodetector shows excellent I-V characteristics. A high −1 V to 1 V on/off ratio (6 × 104) is observed with low dark current (36 nA). A very flat current versus reverse bias characteristic is obtained. By employing LAT-OVG process, Ge crystal quality could be improved by ART and defect necking, and the defective Si/Ge interface is separated from the GOI area, lowering the dark current level and achieving a very flat reverse I-V characteristic (Fig. 5.).
Temperature dependency measurement is done to further investigate the nature of the reverse bias dark current (Fig. 6(a)). Temperature is swept from −40 °C to 180 °C, and the dark current is measured at −1 V (Fig. 6(b)). The observed activation energy of 0.36 eV (approximately half the Ge bandgap energy) strongly indicates that Shockley-Read-Hall (SRH) recombination is the dominating dark current mechanism. Diode ideality factor is also extracted at various temperatures between −40 °C and 180 °C (Fig. 6(c)). At room temperature, an ideality factor of 1.31 is observed. The ideality factor drops as the temperature increases and SRH current becomes more dominant (Table 2).
Using a lock-in based technique, the responsivity of the photodetector is measured with wavelength varying from 750 nm to 900 nm and from 1200 to 1700 nm. The responsivity curves are plotted in Fig. 7. The solid blue line shows the measured responsivity and the dashed blue line shows expected responsivity of an un-strained diode, which is calculated using a transfer matrix method. For the transfer matrix method calculations, 500 nm Ge on 920 nm SiO2, covered by passivation layers of 20 nm Al2O3 and 20 nm LTO (SiO2) is used. Since the laser spot size used for the measurement is larger than the active i-region width of the device, the calculated responsivity is scaled by the portion of the laser power falling onto the i-region of the device. The laser spot size is assumed to be (wavelength/NA) where the numerical aperture of the microscope objective we used was 0.42. Assuming a circular laser spot with uniform spatial power distribution, the portion of the laser power illuminating the i-region is calculated. This portion is used to scale the calculated detector responsivity. The measured absorption spectrum covers most of the C-band (Fig. 7(b)) due to the residual strain from the hetero-epitaxial growth. High absorption at all three wavelengths (850 nm, 1300 nm, and 1550 nm) confirms that LAT-OVG GOI based photodetectors can be used for optical interconnects and telecommunications.
4. Conclusion
For the first time, integration of a GOI photodetector on a Si substrate using LAT-OVG is demonstrated. The entire process flow is CMOS compatible. The resulting photodetector shows excellent diode characteristics with very high on/off ratio, low dark current, and a flat reverse bias I-V characteristic. Due to the residual strain from the epitaxial growth, the diode shows extended light absorption over all three optical telecommunication bands.
References and links
1. J. Michel, J. Liu, and L. C. Kimerling, “High-performance Ge-on-Si photodetectors,” Nat. Photonics 4(8), 527–534 (2010). [CrossRef]
2. D. J. Eaglesham and M. Cerullo, “Dislocation-free Stranski-Krastanow growth of Ge on Si(100),” Phys. Rev. Lett. 64(16), 1943–1946 (1990). [CrossRef] [PubMed]
3. S.-i. Kobayashi, Y. Nishi, and K. C. Saraswat, “Effect of isochronal hydrogen annealing on surface roughness and threading dislocation density of epitaxial Ge films grown on Si,” Thin Solid Films 518(6), S136–S139 (2010). [CrossRef]
4. A. K. Okyay, A. M. Nayfeh, and K. C. Saraswat, “Strain enhanced high efficiency germanium photodetectors in the near infrared for integration with Si,” in Proceedings of the 19th Annual Meetings of the IEEE LEOS (IEEE, 2006), pp. 460–461. [CrossRef]
5. H.-Y. Yu, D. Kim, S. Ren, M. Kobayashi, D. A. B. Miller, Y. Nishi, and K. C. Saraswat, “Effect of uniaxial-strain on Ge p-i-n photodiodes integrated on Si,” Appl. Phys. Lett. 95(16), 161106 (2009). [CrossRef]
6. A. K. Okyay, A. M. Nayfeh, K. C. Saraswat, T. Yonehara, A. Marshall, and P. C. McIntyre, “High-efficiency metal-semiconductor-metal photodetectors on heteroepitaxially grown Ge on Si,” Opt. Lett. 31(17), 2565–2567 (2006). [CrossRef] [PubMed]
7. S. J. Koester, G. Dehlinger, J. D. Schaud, J. O. Chu, Q. C. Ouyang, and A. Grill, “Germanium-on-insulator photodetectors,” in Proceedings of the 2nd IEEE International Conference on Group IV Photonics (IEEE, 2005), pp. 171–173.
8. S. J. Koester, J. D. Schaub, G. Dehlinger, and J. O. Chu, “Germanium-on-SOI infrared detectors for integrated photonic applications,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1489–1502 (2006). [CrossRef]
9. K. Tani, S.-i. Saito, Y. Lee, K. Oda, T. Mine, T. Sugawara, and T. Ido, “Light detection and emission in Germanium-on-insulator diodes,” Jpn. J. Appl. Phys. 51(4S), 04DG09 (2012). [CrossRef]
10. L. Vivien, J. Osmond, J.-M. Fédéli, D. Marris-Morini, P. Crozat, J.-F. Damlencourt, E. Cassan, Y. Lecunff, and S. Laval, “42 GHz p.i.n Germanium photodetector integrated in a silicon-on-insulator waveguide,” Opt. Express 17(8), 6252–6257 (2009). [CrossRef] [PubMed]
11. S. Assefa, F. Xia, S. W. Bedell, Y. Zhang, T. Topuria, P. M. Rice, and Y. A. Vlasov, “CMOS-integrated high-speed MSM germanium waveguide photodetector,” Opt. Express 18(5), 4986–4999 (2010). [CrossRef] [PubMed]
12. S. Liao, N.-N. Feng, D. Feng, P. Dong, R. Shafiiha, C.-C. Kung, H. Liang, W. Qian, Y. Liu, J. Fong, J. E. Cunningham, Y. Luo, and M. Asghari, “36 GHz submicron silicon waveguide germanium photodetector,” Opt. Express 19(11), 10967–10972 (2011). [CrossRef] [PubMed]
13. G. Wang, R. Loo, E. Simoen, L. Souriau, M. Caymax, M. M. Heyns, and B. Blanpain, “A model of threading dislocation density in strain-relaxed Ge and GaAs epitaxial films on Si (100),” Appl. Phys. Lett. 94(10), 102115 (2009). [CrossRef]
14. I. Aberg, B. Ackland, J. V. Beach, C. Godek, R. Johnson, C. A. King, A. Lattes, J. O’Neill, S. Pappas, T. S. Sriram, and C. S. Rafferty, “A low dark current and high quantum efficiency monolithic germanium-on-silicon CMOS imager technology for day and night imaging applications,” in Proceedings of the 2010 IEEE International Electron Devices Meeting (IEEE, 2010), pp. 14.4.1–14.4.4. [CrossRef]
15. C. Rafferty, C. King, B. Ackland, J. O’Neill, I. Aberg, T. S. Sriram, A. Mackay, and R. Johnson, “Monolithic germanium SWIR imaging array,” in Proceedings of the2008IEEE Conference on Technologies for Homeland Security (IEEE 2008), 577–582.
16. T. A. Langdo, C. W. Leitz, M. T. Currie, E. A. Fitzgerald, A. Lochtefeld, and D. A. Antoniadis, “High quality Ge on Si by epitaxial necking,” Appl. Phys. Lett. 76(25), 3700–3702 (2000). [CrossRef]
17. J. Bai, J.-S. Park, Z. Cheng, M. Curtin, B. Adekore, M. Carroll, A. Lochtefeld, and M. Dudley, “Study of the defect elimination mechanisms in aspect ratio trapping Ge growth,” Appl. Phys. Lett. 90(10), 101902 (2007). [CrossRef]
18. J.-S. Park, M. Curtin, J. M. Hydrick, J. Bai, J.-T. Li, Z. Cheng, M. Carroll, J. G. Fiorenza, and A. Lochtefeld, “Low-defect-density Ge epitaxy on Si(001) using aspect ratio trapping and epitaxial lateral overgrowth,” Electrochem. Solid-State Lett. 12(4), H142–H144 (2009). [CrossRef]
19. J. H. Nam, W. S. Jung, J. Shim, T. Ito, Y. Nishi, J.-H. Park, and K. C. Saraswat, “Germanium on Insulator (GOI) Structure Locally Grown on Silicon Using Hetero Epitaxial Lateral Overgrowth,” in Proceedings of the 2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (IEEE 2013), pp. 1–2. [CrossRef]
20. J. H. Nam, S. Alkis, D. Nam, F. Afshinmanesh, J. Shim, J.-H. Park, M. Brongersma, A. K. Okyay, T. I. Kamins, and K. C. Saraswat, “Lateral overgrowth of germanium for monolithic integration of germanium-on-insulator on silicon,” J. Cryst. Growth 416, 21–27 (2015). [CrossRef]
21. Z. Gan and C. M. Tan, “Thermally induced stress in partial SOI structure during high temperature processing,” Microelect. Eng. 71(2), 150–162 (2004). [CrossRef]
22. J.-H. Fournier-Lupien, S. Mukherjee, S. Wirths, E. Pippel, N. Hayazawa, G. Mussler, J. M. Hartmann, P. Desjardins, D. Buca, and O. Moutanabbir, “Strain and composition effects on Raman vibrational modes of silicon-germanium-tin ternary alloys,” Appl. Phys. Lett. 103(26), 263103 (2013). [CrossRef]