Abstract

Soliton dragging logic gates¹ are one example of a novel time domain chirp switch (TDCS) architecture that is applicable to materials other than fibers. The logic in a TDCS is based on time shift keying where a "1" corresponds to a pulse that arrives within the clock window and a "0" to either no pulse or an improperly timed pulse. Although TDCS's generally incur a latency penalty, for high bit-rate applications TDCS's lead to low switching energies. For example, we illustrate an all-fiber inverter with a 1pJ switching energy and a fan-out of 28.

© 1991 Optical Society of America