Expand this Topic clickable element to expand a topic
Skip to content
Optica Publishing Group

System Architecture of a SIMD Image Processor Optimized for Morphologic Processing

Not Accessible

Your library or personal account may give you access

Abstract

Utilizing large amounts of data for repetitive tasks, machine vision falls under the category of processes requiring very fast limited instruction set computers. This paper describes the Parallel Micro Image Processor (PMIP), a general purpose SIMD 256-processor micro-sequencer controlled image processor. Danielsson and Levialdi describe a method for computing the "degree of parallelism" 1 which tells the speed potential of a system. The PMIP has a degree of parallelism of 2560 compared with 112 for GLOPR (Perkin Elmer) and 6336 for the Cytocomputer (ERIM). Section 2 describes the host interface. Section 3 describes the video I/O structure of the PMIP. Of particular interest is its high bandwidth and variable offset grabbing capability within the field-of-view (FOV). Section 4 describes the processor architecture itself, section 5 describes the specialized feature extraction hardware and section 6 describes the programming environment.

© 1987 Optical Society of America

PDF Article
More Like This
Smart Pixel ARray Cellular Logic (SPARCL) Processor for Eliminating SIMD I/O Bottlenecks: System Demonstration and Performance Scaling

J.-M. Wu, C.B. Kuznia, B. Hoanca, C.-H. Chen, L. Cheng, A.G. Weber, and A.A. Sawchuk
OThA.5 Optics in Computing (IP) 1997

Optical Morphological Image Processor

Gary E. Lohman and K.-H. Brenner
TuB4 Optical Computing (IP) 1991

Towards An Optical/Electronic Hybrid Image Processor

M G Nicholson, G G Gibbons, S Mayo, C R Petts, B Loiseaux, J P Huignard, F Dubois, and J Ebbeni
TuD4 Optical Computing (IP) 1987

Select as filters


Select Topics Cancel
© Copyright 2024 | Optica Publishing Group. All rights reserved, including rights for text and data mining and training of artificial technologies or similar technologies.